Flip-Chip Power Semiconductor Package with Thinned Chip
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Solution Overview
Problem
Conventional WLCSP methods face challenges in achieving optimal chip thickness and heat dissipation while minimizing damage and discrete inductance issues, leading to unsatisfactory package size and electrical performance.
Innovation Solution
A flip-chip packaging method involving a lead frame with interconnect rods, where the chip is first packed and then thinned, with a metal layer deposited on the back surface, and contact terminals are formed to protrude from the plastic packaging material, allowing for better heat dissipation and electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the chip is thinned to achieve better package size and electrical parameters, then the package size and electrical performance are improved, but the chip becomes easier to break and more susceptible to damage during processing
Solution Approach 1:
The patent performs plastic packaging of the chip before thinning operations. By encapsulating the chip in plastic material first, the chip is protected from mechanical damage during subsequent thinning and processing steps. This preliminary protective action allows the chip to be thinned to the desired thickness without risking breakage or edge cracks that would occur if thinning were performed on bare chips.
2Reliability
If bonding lines are used to connect chip to bonding pad, then electrical connectivity is achieved, but discrete inductance and larger package size result
Solution Approach 1:
The patent eliminates bonding lines from the package structure by directly connecting the chip to the bonding pad through the plastic packaging material. This extraction of the bonding line component removes the source of discrete inductance and simplifies the overall package structure, while electrical connectivity is maintained through alternative connection paths within the plastic封装.
3Reliability
If conventional FBP packaging is used with bonding lines, then chip connectivity is achieved, but the package has larger size and unsatisfactory electrical performance
Solution Approach 1:
The patent inverts the conventional packaging sequence by performing plastic packaging before chip thinning, rather than thinning first and then packaging. This reversed process sequence allows the chip to be protected during thinning operations and enables the formation of contact terminals that protrude from the plastic packaging, achieving both compact size and improved electrical performance without the need for traditional bonding lines.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces the risk of chip damage, achieves thinner chip thickness, and enhances heat dissipation and electrical performance by forming contact terminals that connect effectively with the bonding pads, resulting in improved package size and electrical parameters.
Implementation Method 1
A top surface of lead frame is packed plastically to encapsulate the chip and interconnect rods with plastic packing materials
Implementation Method 2
encapsulate the chip and interconnect rods with plastic packing materials
Implementation Method 3
A metal layer is then deposited on a back surface of the chip
Implementation Method 4
enhances heat dissipation and electrical performance
Implementation Method 5
a laser beam is then irradiated on a top surface of the plastic packing material
Data Source
AI summary
Preparation methods of forming packaged semiconductor device, specifically for flip-chip vertical power device, are disclosed. In these methods, a vertical semiconductor chip is flip-chip attached to a lead frame and then encapsulated with plastic packing materials. Encapsulated chip is then thinned to a predetermined thickness. Contact terminals connecting the chip with external circuit are formed by etching at least a bottom portion of the lead frame connected.