Flip-Chip Power Switch Lead Assembly Parasitic Reduction

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Solution Overview

Problem

Switching regulators with wire bond packaging face issues due to large parasitic inductance and resistance, while flip-chip packaging improves this but requires an efficient lead assembly design to effectively connect flip-chip interconnects to printed circuit boards.

Innovation Solution

A power switch assembly featuring a flip-chip integrated circuit chip with a lead-frame comprising lead sections that extend in parallel, with contact and extended portions, allowing for efficient connection to printed circuit boards, reducing resistance and enhancing current capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If wire bond packaging is used for power switch portion, then conventional integrated circuit techniques can be applied, but parasitic inductance and resistance become large

Engineering Contradiction:
Improveease of manufactureVSAvoidparasitic inductance and resistance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent extracts the power switch portion from conventional wire bond packaging and implements flip-chip packaging instead. The power switch chip is packaged separately with solder bumps directly connecting to the printed circuit board, removing the wire bonds that caused high parasitic inductance and resistance. This extraction allows the power switch to have low parasitic characteristics while the rest of the regulator can use conventional packaging.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a lead assembly as an intermediary component between the flip-chip power switch and the printed circuit board. The lead assembly includes lead sections with contact portions that receive solder bumps and extended portions that extend laterally to improve current capacity and reduce parasitic inductance. This intermediary structure enables efficient electrical connection while maintaining the benefits of flip-chip packaging.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If flip chip packaging is used for power switch portion, then parasitic inductance and resistance are reduced, but efficient lead assembly design is required to connect flip-chip interconnects to printed circuit board

Engineering Contradiction:
Improveparasitic inductance and resistanceVSAvoidlead assembly design complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The lead assembly is segmented into multiple lead sections, each with a contact portion and an extended portion. The contact portions are arranged to receive solder bumps from the flip-chip power switch, while the extended portions extend laterally to improve current capacity. This segmentation allows each lead section to be optimized for its specific function, simplifying the overall design while maintaining low parasitic characteristics.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The lead sections extend in the lateral dimension rather than only vertically. The extended portions protrude laterally from the contact portions, creating a three-dimensional structure that improves current capacity by providing additional conductive path area. This dimensional change allows the lead assembly to handle high currents while maintaining compact vertical profile.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8942009B2Lead assembly for a flip-chip power switch
Publication Date: 2015.01.27 VOLTERRA SEMICONDUCTOR CORPORATION
  • US8942009B2 patent drawing
  • US8942009B2 patent drawing
  • US8942009B2 patent drawing

AI summary

A power switch assembly includes a flip-chip type integrated circuit chip and a lead-frame with a plurality of spaced apart parallel lead sections. The flip-chip type integrated circuit chip includes a distributed transistor, and first and second pluralities of flip-chip interconnects connected to source and drain regions, respectively. The first and second lead sections at least partially overlap along the first axis. Each of the plurality of lead sections includes a contact portion and an extended portion extending laterally from the contact portion. The extended portions of the first and second lead section extend from the contact portion in opposite directions. The first side of the first and second lead section contacts at least two of the first and plurality of flip-chip interconnects, respectively. The second side of the first and second lead are configured to contact a first and second contact area on a printed circuit board, respectively.