Flip-Chip Die Assembly With Preformed Underfill for Low-Temperature Bonding

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Solution Overview

Problem

Conventional flip-chip soldering with gold, tin, and/or copper bumps requires high temperature reflow, leading to oxidation, strip warpage, and complex underfill processes that increase production costs and result in underfill voids, especially for high bump density and small pitch designs.

Innovation Solution

A preformed underfill is applied between conductive stud bumps on a semiconductor die, allowing low-temperature metal-to-metal bonding and void-free filling, reducing manufacturing complexity and cost through wafer-level processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high temperature reflow is used for conventional solder bump bonding, then reliable electrical connections are achieved, but oxidation and warpage occur

Engineering Contradiction:
Improvejoint strengthVSAvoidoxidation and warpage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the bonding temperature parameter from conventional high temperature (260°C or more) to low temperature (below 260°C) by using metal-to-metal diffusion bonding instead of solder reflow. This parameter change eliminates oxidation and warpage while achieving reliable electrical connections through direct metal bonding between stud bumps and substrate pads.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the thermal-mechanical solder reflow process with a diffusion bonding mechanism. Instead of using molten solder as an intermediate material, the invention directly bonds metal stud bumps to metal substrate pads through atomic diffusion at elevated temperatures, eliminating the harmful effects of conventional soldering.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If conventional underfill dispensing is used, then die stress is reduced, but the process is slow and complicated with increased production costs

Engineering Contradiction:
Improvedie stress controlVSAvoidmanufacturing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by pre-forming the underfill material as a layer on the substrate before placing the semiconductor die. This eliminates the need for post-bonding underfill dispensing and capillary filling processes, significantly reducing manufacturing steps and time while ensuring complete coverage and stress control.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent inverts the conventional underfill process sequence. Instead of dispensing underfill after die bonding (post-bond underfill), the invention applies underfill before die placement (pre-bond underfill), reversing the traditional workflow to achieve both stress control and manufacturing efficiency.

Inventive Principle:
Principle #13The other way round (Inversion)

3Manufacturing precision

If capillary underfilling is used for high bump density designs, then underfill material fills gaps between bumps, but underfill voids occur

Engineering Contradiction:
Improveunderfill filling completenessVSAvoidunderfill voids
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent eliminates underfill voids by pre-forming the underfill layer on the substrate before die placement. This preliminary action ensures complete coverage of the substrate surface with controlled thickness, preventing void formation that occurs during capillary filling in high-density bump designs.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts the underfill application step from the post-bonding process and performs it separately before die placement. This separation eliminates the capillary filling mechanism that causes voids in high-density designs, replacing it with a controlled deposition process that ensures complete coverage.

Inventive Principle:
Principle #2Taking out (Extraction)

4Productivity

If wafer-level processing is used, then manufacturing time and cost are reduced, but process complexity increases

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidprocess complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges multiple manufacturing operations into a single wafer-level processing step. The underfill layer is formed on the entire wafer surface before die separation and bonding, combining what would otherwise be individual die-level operations into one efficient batch process, reducing overall manufacturing time and cost.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The preformed underfill facilitates high-density circuit designs with reduced manufacturing time and cost, mitigating oxidation and warpage, and ensuring robust electrical connections without voids.

Implementation Method 1

underfill material is dispensed under each individual die and a capillary effect ideally fills the gaps between the flip-chip die and the underlying structure between the bumps

Methodology Applied
Scientific EffectCapillary effect: Capillary Action

Data Source

PatentUS20260005177A1Electronic device and flip-chip die assembly with preformed underfill and stud bumps
Publication Date: 2026.01.01 TEXAS INSTRUMENTS INC
  • US20260005177A1 patent drawing
  • US20260005177A1 patent drawing
  • US20260005177A1 patent drawing

AI summary

An electronic device includes a flip-chip die assembly having a semiconductor die and a preformed underfill, the semiconductor die having conductive bond pads spaced apart from one another along a side of the semiconductor die and conductive stud bumps having proximal ends on respective ones of the conductive bond pads and distal ends extending outward from the side, and the preformed underfill extending on a portion of the side between the conductive stud bumps and exposing the distal ends of the conductive stud bumps.