Micro-transfer-printable Flip-chip Structures for Sapphire Substrates
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
There is a need for methods and structures that enable the micro-transfer printing of flipped integrated circuits, particularly those formed on sapphire substrates, and for efficient electrical interconnections with reduced processing steps, as existing techniques do not effectively support the undercutting of chiplets on sapphire substrates for micro-transfer printing.
Innovation Solution
The method involves providing a support substrate, forming semiconductor layers, creating a patterned release layer, and using a handle substrate with a conformable bonding layer to transfer completed semiconductor devices to a destination substrate, where the support substrate is removed, and a tether is formed to connect the device to an anchor, allowing for micro-transfer printing without exposing the device to destructive photolithographic processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If conventional pick-and-place or vacuum tools are used to handle small integrated circuit dies, then the dies can be transferred to a package or destination substrate, but the handling becomes difficult and results in loss or damage for very small dies (less than 200, 50, 20, 10, or 5 microns)
Solution Approach 1:
The patent introduces a stamp as an intermediary tool that contacts the top side of the integrated circuit to adhere it for transfer. This stamp-mediated approach enables handling of very small dies (less than 5 microns) that cannot be effectively manipulated by conventional pick-and-place or vacuum tools, thereby improving ease of operation while maintaining reliability by preventing loss or damage during transfer
Solution Approach 2:
The patent replaces conventional mechanical handling methods (pick-and-place tools, vacuum tools) with a micro-transfer printing mechanism that uses adhesion forces between the stamp and the integrated circuit. This substitution enables reliable transfer of extremely small dies by eliminating the mechanical grasping and manipulation that causes damage in conventional systems
2Ease of manufacture
If photolithographic processes are used to form electrical connections on destination substrate, then electrical interconnections can be established, but the processing steps increase and complexity increases
Solution Approach 1:
The patent merges the transfer process with the electrical connection formation by integrating electrical conductors into the stamp structure. As the stamp adheres and transfers the integrated circuit to the destination substrate, electrical connections are simultaneously established through the integrated conductors, eliminating the need for separate photolithographic connection processes and reducing overall processing complexity
Solution Approach 2:
The stamp is designed with multi-functionality, serving both as the transfer medium for the integrated circuit and as the electrical connection provider through its integrated conductors. This universal tool performs multiple functions (transfer and electrical interconnection) in a single operation, simplifying the manufacturing process and reducing the number of required processing steps
Data Source
AI summary
In certain embodiments, a method of making a semiconductor structure suitable for transfer printing (e.g., micro-transfer printing) includes providing a support substrate and disposing and processing one or more semiconductor layers on the support substrate to make a completed semiconductor device. A patterned release layer and, optionally, a capping layer are disposed on or over the completed semiconductor device and the patterned release layer or capping layer, if present, are bonded to a handle substrate with a bonding layer. The support substrate is removed to expose the completed semiconductor device and, in some embodiments, a portion of the patterned release layer. In some embodiments, an entry path is formed to expose a portion of the patterned release layer. In some embodiments, the release layer is etched and the completed semiconductor devices transfer printed (e.g., micro-transfer printed) from the handle substrate to a destination substrate.