Flip Chip Seed Layer as Electrical Pattern
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Solution Overview
Problem
Existing flip chip packaging methods using gold bumps require complex processes for forming and removing metal seed layers, which increase costs and complicate the evaluation of electrical connections between bumps.
Innovation Solution
A method where the metal seed layer used for electroplating is directly utilized as a metal pattern for forming electrical connections between bumps, eliminating the need for forming and removing electrode wires and allowing for unified photolithography masks, thereby simplifying the process and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal seed layer is formed and then removed after gold bump electroplating, then the gold bump can be formed on the substrate, but the process becomes complicated and evaluation of electrical connections is impossible
Solution Approach 1:
The patent combines the metal seed layer formation and the electrode wiring formation into a single step by forming both patterns simultaneously on the same substrate. This merging eliminates the need to form and remove separate electrode wires, simplifying the manufacturing process while maintaining the ability to evaluate electrical connections between bumps.
2Ease of manufacture
If electrode wires are formed for gold bump electroplating, then the bumps can be formed, but additional processes are required before and after bump formation
Solution Approach 1:
The patent performs preliminary action by forming the metal seed layer pattern and the electrode wiring pattern simultaneously before the gold bump electroplating process. This preliminary combined patterning eliminates the need for additional wire formation and removal processes after bump formation, reducing manufacturing time and steps.
3Manufacturing precision
If the metal seed layer is removed after electroplating, then the gold bump remains on the wafer, but electrical characteristics cannot be evaluated
Solution Approach 1:
The patent merges the metal seed layer with the electrode wiring structure, so that the same metal layer serves dual purposes: as the seed layer for electroplating and as the electrode wiring for electrical connection and evaluation. This allows electrical characteristics to be evaluated while maintaining precise gold bump formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the evaluation of electrical functions between bumps, reduces material and process costs, and enhances the reliability of flip chip manufacturing by streamlining the process and unifying photolithography masks.
Implementation Method 1
A method where the metal seed layer used for electroplating is directly utilized as a metal pattern for forming electrical connections between bumps
Data Source
AI summary
Disclosed is a method for manufacturing a flip chip, in which a gold typically used in a flip chip manufacturing is adhered by conductive adhesives, wherein the method comprises steps of depositing a metal seed layer on a substrate; applying and patterning a photoresist or a dry film; forming a gold bump by electroplating; patterning the seed layer; forming an insulating layer on the seed layer and upper end of the gold bump; and patterning an insulating layer. Accordingly, it is possible to manufacture a flip chip, in which electrical function between bumps can be evaluated, with less cost.