Flip Chip Solder Bump Adhesion via Post-Shaped Bonding Layer
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Solution Overview
Problem
Conventional semiconductor packages have poor adhesive strength of solder bumps, leading to deteriorated electrical characteristics and reliability, especially in fine pitch flip chip bonding.
Innovation Solution
A flip chip semiconductor package is designed with a lower metal bonding layer and an upper metal bonding layer of a post shape that penetrates into the solder bump, improving adhesive strength by covering at least partially the upper metal bonding layer, and optionally including an oxidation preventing layer to enhance reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a conventional solder bump structure is used, then the fabrication process is simple, but the adhesive strength of the solder bump is poor
Solution Approach 1:
The bonding layer is divided into multiple segments: a lower bonding layer directly on the electrode pad, and an upper bonding layer forming a post structure that penetrates the solder bump. This segmentation allows each layer to perform specific functions - the lower layer provides base adhesion while the upper post structure enhances mechanical interlocking with the solder bump, thereby improving overall adhesive strength without excessive complexity
Solution Approach 2:
The bonding structure transitions from a conventional two-dimensional planar configuration to a three-dimensional vertical structure. The upper bonding layer forms a post that extends upward and penetrates into the solder bump, creating vertical interlocking. This dimensional change from 2D to 3D significantly enhances adhesive strength by providing mechanical interlocking in the vertical direction
2Reliability
If the solder bump adhesive strength is improved with a complex structure, then reliability improves, but fabrication complexity increases
Solution Approach 1:
The upper bonding layer post structure is formed in advance before the solder bump is applied. This preliminary formation of the post structure allows the solder bump to be placed and automatically form interlocking with the pre-formed post, ensuring reliable electrical connection without requiring complex post-fabrication processes or precise alignment steps
Solution Approach 2:
The upper bonding layer post is nested within the solder bump structure, with the post penetrating into and being surrounded by the solder material. This nesting configuration ensures that the bonding layer is mechanically interlocked within the solder bump, improving reliability while maintaining a compact and manufacturable structure
Data Source
AI summary
There is provide a flip chip semiconductor package comprising: an electrode pad formed a semiconductor substrate; a lower metal bonding layer formed on the electrode pad; an upper metal bonding layer formed on the lower metal bonding layer and having a post shape of a predetermined height; and a conductive bump formed on the upper metal bonding layer, and a solder bump covers at least partially the surface of the upper metal bonding layer. An insulating layer for electrode reconfiguration is formed around the electrode pad on the substrate, and the insulating layer has a predetermined thickness to prevent the penetration of α particles from the solder bump. The semiconductor package may further comprise an oxidation preventing layer between the solder bump and the upper metal bonding layer. In accordance with the present invention, there is realized the flip chip semiconductor package which improves the adhesive strength of the solder bump and which more improves the reliability in the flip chip bump structure of fine pitches.