Flip-Chip Package Substrate with Single-Step Molding and Dielectric Formation
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Solution Overview
Problem
Conventional flip-chip package substrates face issues with location deviations and weak affinity between primer materials and metal pillars due to separate photolithography processes, leading to reduced yield and reliability, especially in fine pitch packaging.
Innovation Solution
A package substrate design with a conductive pillar layer featuring a metal pillar surrounded by a molding compound layer with a protrusion part, where both the molding compound and dielectric material layers are formed in a single photolithography step, ensuring proper alignment and strong affinity, and a protection layer is added for external protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If separate photolithography processes are used for forming metal pillar segments, then the manufacturing process can be completed, but location deviations occur between segments due to photo-mask misalignments
Solution Approach 1:
The patent merges the formation of the molding compound layer and dielectric material layer into a single photolithography process step. The photoresist layer is applied once, and both the molding compound pattern and dielectric material pattern are formed simultaneously through one exposure and development cycle, eliminating the need for separate photolithography processes and ensuring precise alignment between metal pillar segments.
2Ease of manufacture
If primer material is used in dielectric material layer formation, then the layer can be formed, but the affinity between primer material and metal pillar or molding compound is not strong enough
Solution Approach 1:
The patent changes the material parameter by replacing the primer material with a dielectric material that has strong affinity to both the metal pillar and molding compound. This material substitution improves the adhesion and reliability of the structure while maintaining the functionality of the dielectric layer formation process.
Data Source
AI summary
This disclosure provides a package substrate, a flip-chip package circuit and their fabrication method. The package substrate includes: a first wiring layer having a first metal wire and a first dielectric material layer filling the remaining part of the first wiring layer except for the first metal wire; a conductive pillar layer formed on the first wiring layer and including a metal pillar connected to the first metal wire, a molding compound layer with a protrusion part surrounding the metal pillar, and a second dielectric material layer formed on the molding compound layer; a second wiring layer formed on the conductive pillar layer and including a second metal wire connected to the metal pillar; and a protection layer formed on the second wiring layer.