Flip-Chip Package Longitudinal Trenches for Low Resistance
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Solution Overview
Problem
Existing flip-chip packages face challenges in achieving low resistance connections between solder bumps without increasing the thickness of the ground and power planes, which is necessary for maintaining optimal power signal transmission and reducing noise levels, especially in small form-factor packages.
Innovation Solution
The solution involves creating a flip-chip package with a substrate that includes longitudinal trenches filled with conductive material, allowing for low resistance paths between solder bumps without thickening the conductive planes, achieved through laser drilling or imprinting processes, and using a conductive plane that at least partially covers the trenches, with solder resist layers and conductive pads for connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thick conductive planes are used to achieve low resistance connections between solder bumps, then electrical conductivity is improved, but package thickness increases
Solution Approach 1:
The conductive path is segmented into multiple components: thin conductive planes in substrate layers, longitudinal trenches filled with conductive material, and conductive pads. This segmentation allows achieving low resistance connections without requiring thick conductive planes throughout the entire package structure.
Solution Approach 2:
The patent introduces longitudinal trenches that extend in the vertical dimension through the substrate layers. These trenches filled with conductive material provide additional conductive pathways in the thickness direction, enabling low resistance connections without increasing the lateral dimensions or requiring thicker overall package.
2Reliability
If micro-vias or PTH connections are used to connect conductive planes, then electrical connectivity is improved, but device complexity increases
Solution Approach 1:
The patent merges the functions of micro-vias/PTH connections with the conductive planes by filling longitudinal trenches with conductive material that directly connects the conductive planes. This eliminates the need for separate via structures and reduces overall connection complexity.
Solution Approach 2:
The patent extracts and eliminates the complex micro-via and PTH connection structures from the design. Instead, it uses simplified conductive pads and trench-filled conductive material to achieve the same electrical connectivity function with reduced structural complexity.
3Object-affected harmful factors
If thick conductive planes are used to reduce noise levels, then electromagnetic interference resistance is improved, but manufacturing cost increases
Solution Approach 1:
The patent applies thick conductive material locally within the longitudinal trenches only where needed for noise reduction and low resistance connections, rather than using thick conductive planes throughout the entire substrate. This localized approach reduces material costs and manufacturing complexity while maintaining noise reduction effectiveness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables low resistance connections between solder bumps, facilitating effective power delivery and noise reduction without the need for thick conductive planes, allowing for cost-effective production on small form-factors and reducing the complexity of micro-vias or PTH connections.
Implementation Method 1
allowing for low resistance paths between solder bumps without thickening the conductive planes, achieved through laser drilling or imprinting processes
Data Source
AI summary
A flip-chip package is disclosed. The flip-chip package includes a substrate comprising at least one build-up layer. At least one longitudinal trench is formed in at least one build-up layer of the substrate. The at least one longitudinal trench filled with a conductive material. A conductive plane may be disposed at least partially on the at least one longitudinal trench. An insulating layer may cover the conductive plane and, at least in part, at least one build-up layer of the substrate. The solder resist layer may include a plurality of openings partially exposing the conductive plane. A plurality of conductive pads may be disposed on the conductive plane through the plurality of openings. A method for fabricating the flip-chip package is also disclosed.