Flip Chip Underfilling Layer ESD Protection Mechanism
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Solution Overview
Problem
Conventional flip chip packages are vulnerable to electrostatic electricity, and existing protective measures are ineffective in preventing electrostatic discharge from flowing through the packages.
Innovation Solution
Incorporating a ground pattern and an underfilling layer with a voltage-sensitive material that converts into a diode when electrostatic electricity is applied, allowing the electricity to flow through the ground pattern instead of the semiconductor chip, thus protecting it from electrostatic damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a blocking member is provided to protect the flip chip package from electrostatic electricity, then the package structure is enhanced for ESD protection, but the blocking member does not effectively prevent electrostatic electricity from flowing through the package
Solution Approach 1:
The underfilling layer material changes its electrical parameter (conductivity) in response to electrostatic electricity application, transitioning from insulating state to conductive state to form a diode that redirects ESD current away from the semiconductor chip
Solution Approach 2:
The underfilling layer acts as an intermediary between the electrostatic electricity and the semiconductor chip, selectively forming a conductive path that diverts harmful ESD current through the ground pattern while protecting the chip
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively redirects electrostatic electricity away from the semiconductor chip, enhancing the protection of flip chip packages against electrostatic discharge and ensuring reliable operation.
Implementation Method 1
The underfilling layer may have a diode selectively formed between the ground pattern and the conductive bumps by electrostatic electricity applied to the underfilling layer
Implementation Method 2
The underfilling layer may have a diode selectively formed between the ground pattern and the conductive bumps by electrostatic electricity applied to the underfilling layer to protect the semiconductor chip from the electrostatic electricity
Data Source
AI summary
Flip chip packages and methods of manufacturing the same are provided, the flip chip packages may include a package substrate, a semiconductor chip, conductive bumps, a ground pattern and an underfilling layer. The semiconductor chip may be over the package substrate. The conductive bumps may be between the semiconductor chip and the package substrate to electrically connect the semiconductor chip and the package substrate with each other. The ground pattern may ground one of the package substrate and the semiconductor chip. The underfilling layer may be between the package substrate and the semiconductor chip to surround the conductive bumps. The underfilling layer may have a diode selectively located between the ground pattern and the conductive bumps by electrostatic electricity applied to the underfilling layer to protect the semiconductor chip from the electrostatic electricity.