Flip Chip Package Underfill Flow via Solder Resist Opening
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In flip chip packaging, the uneven flow of under-fill material between solder bumps can lead to voids due to trapped air, which reduces the reliability of semiconductor packages, especially as components become smaller and lighter.
Innovation Solution
Creating a flip chip package design where the solder resist is removed between bumps to form an opening, allowing for faster under-fill flow, and incorporating an inner material layer with higher wettability than the solder resist to enhance the flow speed and uniformity of the under-fill.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If solder resist is kept between bumps to protect pads, then pad protection is improved, but under-fill flow speed deteriorates causing void formation
Solution Approach 1:
The patent removes the solder resist material from the region between bumps, extracting the harmful element (solder resist blocking flow) while preserving it in areas where protection is needed. This creates selective exposure that allows under-fill to flow rapidly between bumps without compromising pad protection in other areas.
Solution Approach 2:
The patent applies different material properties to different locations: solder resist is present on pads for protection but absent between bumps for flow promotion. This local differentiation allows simultaneous achievement of pad protection and rapid under-fill flow by tailoring material presence to specific functional requirements of each region.
2Weight of moving object
If component size is reduced to make packages smaller and lighter, then weight and size are improved, but under-fill flow uniformity deteriorates due to narrower gaps
Solution Approach 1:
The patent removes solder resist from between bumps to create clear flow paths, extracting the blocking element that would impede under-fill movement. This ensures uniform flow distribution even in miniaturized packages where gap dimensions are reduced, preventing void formation despite narrower spaces.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents voids by increasing the flow speed and uniformity of the under-fill between bumps, thereby enhancing the reliability and efficiency of the flip chip package manufacturing process.
Implementation Method 1
an under-fill being filled in between the substrate and the chip, and the solder resist may include an opening in such a way that a flowing space of the under-fill is provided in between the plurality of bumps
Implementation Method 2
a wettability of the under-fill for the inner material layer may be greater than a wettability of the under-fill for the solder resist
Data Source
AI summary
A flip chip package and a manufacturing method thereof are disclosed. The flip chip package in accordance with an embodiment of the present invention includes: a substrate; a plurality of pads formed on the substrate; a solder resist covering the substrate in such a way that the pads are exposed; a chip mounted on the substrate in such a way that the chip is electrically connected with the pads; a plurality of bumps formed, respectively, on the pads in such a way that the bumps are interposed between the pads and the chip; an under-fill flowing between the substrate and the chip and being filled in between the substrate and the chip; and an opening placed in between the plurality of bumps in such a way that a flowing space of the under-fill is provided in between the plurality of bumps.


