Semiconductor Flip Chip Package Wire Bonding Net Switching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The high cost of flip chip packages due to the need for different bumping masks for various bump options and the inability to change or rework die versions once determined, leading to complex die version management in semiconductor packaging.
Innovation Solution
Implementing a semiconductor flip chip package that uses wire bonding for net switching, allowing for flexible switching between input/output (I/O) pads using a single bumping option, thereby reducing the need for multiple photomasks and simplifying die version management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If different bumping masks are used for various bump options, then the flip chip package can achieve different I/O configurations, but the production cost increases
Solution Approach 1:
The patent implements a universal bumping mask that can support multiple I/O configurations through a single design. The carrier substrate is designed with multiple pad sites that can be selectively connected to the flip chip bump sites through different wire bonding patterns, eliminating the need for multiple specialized bumping masks. This multi-functional approach allows the same mask to produce different package configurations based on wire bonding selections.
Solution Approach 2:
The patent introduces dynamic reconfigurability through wire bonding after the bumping process. Instead of fixing the I/O configuration during the static bumping mask stage, the system allows dynamic selection of I/O mappings through post-bumping wire bonding operations. This enables the same bumped carrier substrate to be adapted to different configurations based on actual product requirements.
2Adaptability or versatility
If a specific bump option is selected, then the die version is determined, but the ability to change or rework is lost
Solution Approach 1:
The patent makes the I/O configuration dynamic by separating the bumping stage from the final configuration determination. The bumping mask creates potential connection paths, but the actual I/O mapping is determined later through wire bonding selections. This dynamic approach allows rework and configuration changes without requiring physical die replacement or mask changes.
Solution Approach 2:
The patent segments the configuration determination process into two independent stages: bumping stage (creating potential paths) and wire bonding stage (selecting actual connections). This segmentation allows the bumping mask to remain fixed while the wire bonding patterns provide the flexibility for different configurations and rework scenarios.
3Adaptability or versatility
If multiple bumping options are maintained in stock, then different I/O configurations can be achieved, but die version management complexity increases
Solution Approach 1:
The patent creates a universal carrier substrate design that can accommodate multiple I/O configurations through a single bumping mask. The carrier substrate includes multiple pad sites arranged to support various I/O mappings, and the wire bonding process selects which pads are actively connected. This eliminates the need to maintain multiple specialized die versions in stock.
Solution Approach 2:
The patent changes the configuration parameter from fixed during bumping to variable through wire bonding. By maintaining constant bumping parameters (single mask design) and varying the wire bonding parameters (connection patterns), the system achieves configuration variety without requiring multiple die versions, simplifying inventory management.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces production costs and simplifies die version management by enabling flexible switching between I/O pads using wire bonding, eliminating the need for multiple bumping options and photomasks, while maintaining electrical connectivity.
Implementation Method 1
a bond wire electrically coupling the first I/O terminal to a first interconnection of the plurality of interconnections at a first surface of the carrier substrate
Data Source
AI summary
This invention provides a semiconductor flip chip package including a carrier substrate and a flip chip mounted on the carrier substrate. The flip chip comprises a first input/output (I/O) pad and a second I/O pad on an active surface of the flip chip, wherein a switching between the first I/O pad and the second I/O pad is implemented by wire bonding.


