Dynamic Flip-Flop Feedback Loop for Low-Frequency Data Retention
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Solution Overview
Problem
There is a tradeoff between frequency range and complexity in flip-flop circuits, with static flip-flops offering higher frequency but increased power consumption and dynamic flip-flops being more efficient but lacking retention capability at lower frequencies.
Innovation Solution
A dynamic flip-flop circuit with a feedback loop that uses partially open transmission gates as leakage feedback, allowing data retention for longer periods while maintaining low dynamic power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the complexity of flip-flop circuit is increased to improve frequency range, then frequency range is improved, but power consumption increases
Solution Approach 1:
The patent applies parameter changes by adjusting the voltage levels applied to the transmission gate control signals. By using specific voltage combinations (e.g., 0V and 0.7V instead of full rail-to-rail voltages), the transmission gates operate in a partially conductive state that reduces dynamic power consumption while maintaining adequate signal transmission for the desired frequency range.
Solution Approach 2:
The patent implements partial action by using transmission gates that are intentionally not fully turned on or off. The transmission gates operate in a partially conductive state, providing just enough signal transmission capability to achieve the target frequency range while minimizing the switching activity that causes dynamic power consumption. This partial conduction state optimizes the tradeoff between speed and power.
2Use of energy by moving object
If dynamic flip-flop is used to reduce power consumption, then power consumption is reduced, but data retention capability at lower frequencies deteriorates
Solution Approach 1:
The patent implements feedback by connecting the output of each dynamic flip-flop stage back to its input through the transmission gate network. This feedback path, enabled by the partially conductive transmission gates, continuously reinforces the stored data state, allowing the flip-flop to maintain data retention capability even at lower frequencies where traditional dynamic flip-flops would fail. The feedback mechanism compensates for the naturally shorter retention time of dynamic structures.
3Device complexity
If simpler flip-flop circuit is used to reduce component count, then device complexity is reduced, but frequency range is limited
Solution Approach 1:
The patent applies universality by designing a transmission gate-based feedback network that serves multiple functions simultaneously: it provides data transmission paths, implements feedback for data retention, and enables frequency extension beyond what the base dynamic flip-flop structure could achieve alone. This multi-functional approach allows the same circuit elements to address both simplicity and performance requirements.
Data Source
AI summary
A dynamic flip-flop circuit with a feedback loop includes a input tristate circuit configured to receive a data signal and a clock signal to output a tristate output data signal. The dynamic flip-flop circuit also includes a feedforward circuit configured to receive the tristate output data signal as input to output a feedforward output data signal. The dynamic flip-flop circuit also includes a feedback loop circuit configured to connect the output of the feedforward circuit and the output of the input tristate circuit. The feedback loop circuit includes a transmission gate circuit that is partially on.