Flip-Flop Power Gate for Data Storage Array Leakage
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Solution Overview
Problem
Flop-array circuits used in data storage arrays face challenges such as increased power consumption and leakage currents due to the large input load and the operation of two latch stages in flip-flop circuits, even when only one stage is actively storing data.
Innovation Solution
The proposed solution involves deactivating the first-stage circuit of a flip-flop storage element when it is not selected for a write operation, thereby reducing power dissipation in the flop-array circuit. This is achieved through the use of a power gate circuit that couples and decouples the first-stage circuit from the power supply node based on the activation status of the write word line.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If both latch stages in flip-flop circuits are kept active, then data storage reliability is improved, but power consumption and leakage currents increase
Solution Approach 1:
The flip-flop circuit is divided into two independent latch stages (first-stage circuit and second-stage circuit), allowing them to be controlled separately. The power gate circuit enables selective activation of each latch stage based on operational needs, so that only the necessary stage is powered at any given time, reducing overall power consumption while maintaining reliability when both stages are needed.
Solution Approach 2:
The power gate circuit dynamically adjusts the power supply state of the first-stage circuit based on the activation status of the write word line. When the write word line is inactive, the first-stage circuit is decoupled from the power supply node, reducing leakage current. When active, the first-stage circuit is coupled to the power supply node, ensuring proper operation. This dynamic control optimizes the trade-off between reliability and power consumption.
2Reliability
If the first-stage circuit remains coupled to power supply continuously, then circuit operation reliability is improved, but leakage current increases
Solution Approach 1:
The power gate circuit implements dynamic power coupling for the first-stage circuit. The coupling state changes based on the activation status of the write word line: coupled when active (ensuring reliability), decoupled when inactive (reducing leakage current). This dynamic adjustment resolves the contradiction between continuous operation reliability and leakage current reduction.
Solution Approach 2:
The power supply parameter (power coupling state) of the first-stage circuit is changed based on operational conditions. The power gate circuit adjusts the power supply connection parameter from coupled to decoupled state, thereby changing the power consumption characteristic to reduce leakage current when the first-stage circuit is not actively being written to, while maintaining reliability when needed.
3Use of energy by moving object
If power gate circuit is added to control first-stage circuit, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The power gate circuit is integrated into the existing flip-flop structure and serves multiple functions: it controls power supply to the first-stage circuit, reduces leakage current, and maintains operational reliability. By making the power gate circuit multi-functional within the context of the flip-flop array, the increase in device complexity is justified by the significant power consumption reduction achieved.
Data Source
AI summary
A memory circuit including a storage array circuit and a control circuit is disclosed. The control circuit may select a particular row of storage circuits in the storage array circuit and activate a first-stage circuit in a particular storage circuit in the particular row by coupling the first-stage circuit to a power supply node. At a later point in time, the control circuit may initiate a transfer of write data from the first-stage circuit to a second-stage circuit in the particular storage circuit and de-activate the first-stage circuit by de-coupling the first-stage circuit from the power supply node. Additionally, the control circuit may also de-select the particular row, at a different point in time, and maintain a de-activated state of the first-stage circuit until a subsequent selection of the particular row.