Master-Slave Flip-Flop Reset Gating for Lower Power

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Solution Overview

Problem

The increasing power consumption of flip-flops in low-power chips used in mobile devices leads to reduced performance and battery life, necessitating a design that minimizes power usage without compromising functionality.

Innovation Solution

A flip-flop design incorporating an input switching circuit that outputs intermediate signals based on clock and inverted clock signals, along with a blocking circuit that disconnects driving voltage during reset operations to prevent unnecessary charging and discharging, thereby reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the flip-flop operates continuously without blocking during reset operations, then the reset functionality is maintained, but power consumption increases due to unnecessary charging and discharging

Engineering Contradiction:
Improvepower consumptionVSAvoidcircuit complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The blocking circuit proactively disconnects the driving voltage from the input switching circuit before unnecessary charging and discharging occurs during reset operations. By anticipating the reset condition and blocking the voltage supply in advance, the patent prevents energy waste rather than recovering it after the fact.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts the blocking function as a separate dedicated circuit component that selectively removes the driving voltage connection during reset operations. This separation allows the main flip-flop functionality to remain intact while the blocking circuit independently manages power consumption during reset states.

Inventive Principle:
Principle #2Taking out (Extraction)

2Loss of energy

If the blocking circuit disconnects driving voltage during reset operations, then power consumption decreases, but the circuit complexity increases due to additional blocking components

Engineering Contradiction:
Improvepower consumptionVSAvoidcircuit complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The blocking circuit is designed to serve multiple purposes: it blocks the driving voltage during reset operations to reduce power consumption, while also maintaining compatibility with the normal operation of the flip-flop. This multi-functionality justifies the added complexity by providing both power savings and functional integrity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The blocking circuit acts as an intermediary component between the driving voltage source and the input switching circuit. It mediates the connection by selectively enabling or disabling the voltage supply based on the operational state, thereby protecting the main flip-flop circuit from unnecessary energy consumption during reset operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If the flip-flop uses traditional continuous operation mode, then the circuit simplicity is maintained, but power consumption increases due to unnecessary charging and discharging during reset

Engineering Contradiction:
Improvecircuit complexityVSAvoidpower consumption
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The patent introduces dynamic control to the previously static continuous operation mode. The blocking circuit dynamically adjusts the connection state of the driving voltage based on the operational phase (normal operation vs. reset), transforming the fixed continuous supply into an adaptive selective supply that reduces power consumption during reset operations.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11528018B2Flip-flop, master-slave flip-flop, and operating method thereof
Publication Date: 2022.12.13 SAMSUNG ELECTRONICS CO LTD
  • US11528018B2 patent drawing
  • US11528018B2 patent drawing
  • US11528018B2 patent drawing

AI summary

A flip-flop includes an input switching circuit configured to output an intermediate signal based on an input signal and at least one of a phase of a clock signal or a phase of an inverted clock signal, the phase of the inverted clock signal being opposite to the phase of the clock signal, and block application of a driving voltage to at least one circuit element of the input switching circuit in response to receiving a reset signal representing a reset operation of the flip-flop, and a latch circuit configured to generate an output signal based on the intermediate signal according to the at least one of the phase of the clock signal or the phase of the inverted clock signal.