Flip-Flop Trigger Voltage Swing Control for Low-Power Scan Testing
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Solution Overview
Problem
Silicon-on-chip (SOC) designs face high power consumption issues during full scan testing due to flip-flop circuits and combinational logic toggling simultaneously, exceeding the circuit's power rating as IC chip density and speed increase.
Innovation Solution
A flip-flop circuit design that includes a trigger stage configured to set an output signal to have two different voltage swings, reducing power consumption by toggling fewer transistors in response to a clock signal, specifically utilizing a voltage setting circuit to adjust voltage levels for the trigger stage output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all flip-flops and combinational logic toggle simultaneously during scan testing, then testing coverage is improved, but power consumption increases beyond circuit rating
Solution Approach 1:
The flip-flop circuit is segmented into a first latch, a second latch, and a trigger stage. The trigger stage is further divided into a logic circuit and a voltage setting circuit. This segmentation allows selective control of different parts of the circuit during scan testing, enabling the trigger stage to remain static while latches toggle, thereby reducing overall power consumption while maintaining testing coverage.
Solution Approach 2:
The voltage setting circuit dynamically adjusts the voltage level provided to the trigger stage based on the operational mode (scan mode or data mode). During scan testing, the voltage setting circuit maintains the trigger stage in a static state with appropriate voltage levels, preventing unnecessary toggling and reducing power consumption while still allowing the latches to be tested.
2Productivity
If IC chip density and speed increase, then circuit performance is improved, but power consumption during scan testing exceeds circuit rating
Solution Approach 1:
Different voltage levels are applied to different parts of the flip-flop circuit based on their operational requirements. The voltage setting circuit provides a first voltage level to the trigger stage during scan testing to minimize power consumption, while ensuring that the latches receive appropriate voltage levels to maintain high-speed operation and density performance.
3Use of energy by moving object
If trigger stage output signal has reduced voltage swing, then power consumption is reduced, but logical state updates may be compromised
Solution Approach 1:
The voltage setting circuit dynamically adjusts the voltage level provided to the trigger stage based on the operational mode. During scan testing, it provides a reduced voltage level to minimize power consumption. During normal data operation, it restores the voltage level to ensure proper logical state updates. This dynamic adjustment resolves the contradiction between power reduction and reliable operation.
Solution Approach 2:
The voltage setting circuit acts as an intermediary between the trigger stage and the power supply, controlling the voltage level provided to the trigger stage. It mediates between the need for reduced power consumption during scan testing and the need for full voltage operation during data mode, ensuring that logical state updates are only performed when necessary and at appropriate voltage levels.
Data Source
AI summary
A flip-flop circuit includes a first latch, a second latch and a trigger circuit. The first latch is configured to set a first output signal based on at least a first input signal and a clock signal. The second latch is configured to set a second output signal based on a second input signal and the clock signal. The trigger circuit is coupled with the first latch and the second latch. The trigger circuit is configured to generate the second input signal based on at least the second output signal. The trigger circuit is configured to cause the second input signal to have a first voltage swing or a second voltage swing based on the first output signal and the second output signal. The first voltage swing is different from the second voltage swing.


