Shift Register Flip-Flop Memory Circuit for Display Area

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Solution Overview

Problem

Conventional memory liquid crystal displays have a relatively small display area due to the presence of gate and source drivers, which hinders size reduction and increases power consumption.

Innovation Solution

A display device with a shift register comprising flip-flops connected in series, voltage selection portions, and display element portions, allowing data to be transferred and stored without the need for traditional driver circuits, thereby reducing circuit area and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If gate driver and source driver are provided in conventional memory liquid crystal displays, then the display device can hold data in memory for low power consumption, but the circuit area increases and display area proportion decreases

Engineering Contradiction:
Improvepower consumptionVSAvoidcircuit area
Core Design Contradiction:
Use of energy by stationary objectVSArea of stationary object

Solution Approach 1:

The invention extracts and removes the gate driver and source driver from the conventional memory liquid crystal display configuration. By eliminating these driver circuits, the patent achieves both reduction in circuit area and maintenance of low power consumption through the memory function, directly resolving the technical contradiction between power consumption and circuit area.

Inventive Principle:
Principle #2Taking out (Extraction)

2Use of energy by stationary object

If gate driver and source driver are provided in conventional memory liquid crystal displays, then the display device can hold data in memory for low power consumption, but the proportion of display area in the entire panel becomes small

Engineering Contradiction:
Improvepower consumptionVSAvoiddisplay area proportion
Core Design Contradiction:
Use of energy by stationary objectVSArea of stationary object

Solution Approach 1:

The invention extracts and removes the gate driver and source driver from the conventional memory liquid crystal display configuration. By eliminating these driver circuits, the patent achieves both reduction in circuit area and maintenance of low power consumption through the memory function, directly resolving the technical contradiction between power consumption and circuit area.

Inventive Principle:
Principle #2Taking out (Extraction)

3Area of stationary object

If flip-flops are connected in series to form a shift register, then the circuit area is reduced by eliminating driver circuits, but data must be sequentially transferred which may affect writing speed

Engineering Contradiction:
Improvecircuit areaVSAvoiddata writing speed
Core Design Contradiction:
Area of stationary objectVSSpeed

Solution Approach 1:

The invention employs periodic clock signals to control the sequential operation of flip-flops in the shift register. Data is written in batches corresponding to display refresh cycles, with each clock pulse advancing one bit of data through the chain. This periodic action allows efficient use of the sequential architecture while maintaining compatibility with display refresh rates, resolving the contradiction between circuit area reduction and data writing speed.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS9368056B2Display device
Publication Date: 2016.06.14 SHARP KK
  • US9368056B2 patent drawing
  • US9368056B2 patent drawing
  • US9368056B2 patent drawing

AI summary

In a pixel memory portion of a display device, as corresponding to each pixel memory unit, there are provided a flip-flop, a voltage selection portion, which selects either white display voltage or black display voltage in accordance with an output signal from the flip-flop, and a liquid crystal capacitance, which reflects the voltage selected by the voltage selection portion in the display state of the pixel that corresponds to the flip-flop. Moreover, the flip-flops respectively included in the pixel memory units within the pixel memory portion are connected in series, forming a shift register.