Flip-Flop Circuit State Hold for Low-Power Signal Retention
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Solution Overview
Problem
Conventional semiconductor integrated circuit devices with flip-flop circuits face challenges in reducing power consumption while maintaining operation speed, as existing methods either increase clock-output delay or require larger circuit sizes to maintain speed.
Innovation Solution
A semiconductor integrated circuit device incorporating a comparator and a flip-flop circuit that compares input and output signal logical values, generating a combination signal to maintain the output state without discharging electric charge when the signals are the same, thereby reducing power consumption without affecting operation speed or increasing circuit size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a clock control circuit is used to suppress flip-flop operation when input and output signals are the same, then power consumption is reduced, but clock-output delay and setup time increase causing operation speed to decrease
Solution Approach 1:
The patent extracts the power consumption problem to a specific location (discharge path) and applies the control circuit only where needed, rather than controlling the entire flip-flop operation. This targeted approach reduces power consumption without affecting the overall operation speed of the flip-flop circuit.
Solution Approach 2:
The discharge control circuit acts as an intermediary element inserted on the discharge path. It mediates between the need to reduce power consumption and the need to maintain operation speed by selectively controlling the discharge operation without interfering with the main signal path timing.
2Loss of energy
If a discharge control circuit is inserted on the discharge path to maintain charge when input and output signals are the same, then power consumption is reduced, but the amount of current on the discharge path during state transition is reduced causing operation speed to decrease and circuit size to enlarge
Solution Approach 1:
The patent applies partial action by controlling only the discharge operation rather than the entire flip-flop circuit. The discharge control circuit is activated only when needed (when input and output signals are the same) to maintain charge, rather than continuously controlling all operations. This partial control reduces power consumption without requiring the circuit to be oversized for continuous operation.
Data Source
AI summary
A semiconductor integrated circuit device includes a comparator for making a comparison between a logical value of an input signal and a logical value of an output signal and outputting a combination signal having a combination of the logical values; and a flip-flop circuit configured to maintain a state of the output signal with electric power for maintaining the state less than electric power for state transition of the output signal in the case where the combination of the logical values of the combination signal is a predetermined combination, and wherein the comparator outputs the combination signal having the predetermined combination to an input terminal portion in the case of determining that the input signal does not vary the state of the output signal based on a result of the comparison between the logical value of the input signal and the logical value of the output signal.