Flip-Flop Test Circuit with Parallel Switching

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Solution Overview

Problem

The existing methods for testing the operation of flip-flops in a semiconductor device, such as counter circuits, require a long time due to the sequential operation of flip-flops connected in series, leading to increased manufacturing throughput time.

Innovation Solution

A method is introduced where flip-flops are connected in series through switches, allowing a test signal to be supplied in parallel, and the switches are configured to turn on and off to independently operate each flip-flop, reducing the time required for operation testing by cutting interconnects after the device is diced.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If flip-flops are connected in series for operation testing, then each flip-flop can be tested individually, but the test time becomes excessively long

Engineering Contradiction:
Improveoperation test coverageVSAvoidtest time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies dynamics by making the connection configuration changeable through switches. The switches can dynamically reconfigure the flip-flop connections from series to parallel mode during testing, and then back to series mode for normal operation. This dynamic reconfiguration allows the system to adapt its structure based on the operational phase, resolving the contradiction between individual testing capability and test time duration.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent segments the testing process into distinct phases: series connection mode for normal operation and parallel connection mode for testing. By introducing switches as control elements, the system can segment the operational modes and activate the appropriate configuration for each phase, thereby achieving both individual flip-flop testing and reduced overall test time.

Inventive Principle:
Principle #1Segmentation

2Loss of time

If switches are added to enable parallel testing of flip-flops, then test time is reduced, but device complexity increases

Engineering Contradiction:
Improvetest timeVSAvoidcircuit complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The switches serve multiple functions: they act as connection elements during normal series operation, enable parallel reconfiguration during testing, and can be integrated into the existing circuit architecture without requiring completely separate testing infrastructure. This multi-functionality reduces the net increase in device complexity while achieving parallel testing capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the testing functionality with the existing circuit structure by integrating switches into the flip-flop connection network. Rather than adding completely separate testing equipment, the solution combines the reconfiguration capability with the operational circuit, thereby minimizing the increase in overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If interconnects are cut after dicing to activate parallel mode, then manufacturing throughput is improved, but additional processing steps are required

Engineering Contradiction:
Improvemanufacturing throughputVSAvoidprocess complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The switches are pre-configured in a default state during manufacturing that enables parallel testing mode. The interconnect cutting is performed as a preliminary action during the dicing process itself, rather than requiring a separate post-processing step. This preliminary configuration allows the device to be tested in parallel mode immediately after dicing, improving manufacturing throughput without significantly increasing process complexity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10608643B2Semiconductor device including integrated circuit of flip-flops and switches
Publication Date: 2020.03.31 KK TOSHIBA
  • US10608643B2 patent drawing
  • US10608643B2 patent drawing
  • US10608643B2 patent drawing

AI summary

A method for manufacturing a semiconductor device includes forming a circuit including a plurality of flip-flops, a plurality of first switches, a second switch and a signal line on a wafer, the flip-flops being connected in series through the first switches, respectively, and the signal line being connected to the second switch, and being configured to supply a signal in parallel to the flip-flops; testing the flip-flops by turning off the first switches, turning on the second switch, and supplying a test signal in parallel through the signal line to the flip-flops; and cutting at least one interconnect of a switch portion in the circuit, the switch portion including the first switches and the second switch, so that the first switch is turned on and the second switch is turned off.