Dual-Port Slave Latch Flip-Flop for External State Updates
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Solution Overview
Problem
Non-volatile logic circuits face challenges in updating sequential elements like flip-flops without significantly slowing their operation, especially when requiring external updates from non-volatile memory.
Innovation Solution
A flip-flop circuit design incorporating a 2-input multiplexer, master latch, transfer gate, and dual-port slave latch with a tri-state inverter, allowing for external data input without affecting the critical timing path, thus maintaining negligible performance change.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If non-volatile logic circuits are implemented to allow updating of sequential elements from external sources, then data retention capability is improved, but the operation speed of sequential elements is significantly slowed
Solution Approach 1:
The slave latch is divided into two independent ports: a first port for receiving data from the sequential element during normal operation, and a second port for receiving data from external non-volatile memory sources. This segmentation allows each port to operate independently without interfering with the critical timing path of the other, thus maintaining high operation speed while enabling data retention capability.
Solution Approach 2:
A tri-state inverter is introduced as an intermediary component at the second port of the slave latch. This tri-state inverter acts as a mediator that can selectively connect or disconnect the external data input from the latch internal node, allowing external data to be loaded without affecting the timing-critical path between the sequential element and the latch feedback. The tri-state mechanism enables controlled data input while preserving the high-speed operation characteristics.
2Adaptability or versatility
If a dual-port slave latch is used to enable external data input, then adaptability is improved, but device complexity increases
Solution Approach 1:
The slave latch is designed with dual-port functionality where the same latch structure can accept data from multiple sources (sequential element and external memory) through different ports. The tri-state inverter at the second port provides universal data input capability, allowing the latch to function in both normal operation mode (first port active) and external update mode (second port active), thereby achieving multi-functionality without requiring separate latch structures for each mode.
Solution Approach 2:
The tri-state inverter acts as a flexible control mechanism that can dynamically enable or disable data input paths based on operational mode. This flexible control structure allows the latch to adapt between different data input sources without permanent structural changes, achieving adaptability through controllable connectivity rather than fixed complex interconnections.
Data Source
AI summary
In an embodiment of the invention, a flip-flop circuit contains a 2-input multiplexer, a master latch, a transfer gate and a slave latch. The scan enable control signals SE and SEN of the multiplexer determine whether data or scan data is input to the master latch. The clock signals CLK and CLKN and retention control signals RET and RETN determine when the master latch is latched. The slave latch is configured to receive the output of the master latch, a second data bit D2, the clock signals CLK and CLN, the retain control signals RET and RETN, the slave control signals SS and SSN. The signals CLK, CLKN, RET, RETN, SS and SSN determine whether the output of the master latch or the second data bit D2 is latched in the slave latch. Control signals RET and RETN determine when data is stored in the slave latch during retention mode.