Flipped-Gate Voltage Reference for Substrate Noise Isolation
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Solution Overview
Problem
Conventional voltage reference circuits using bipolar junction transistors (BJTs) and CMOS devices are susceptible to substrate noise, which affects the accuracy of the reference voltage, especially at higher temperatures, and do not provide full isolation from substrate noise.
Innovation Solution
A voltage reference circuit utilizing a flipped gate transistor with an anti-doped gate electrode and a sizing arrangement between transistors to produce a temperature-independent reference voltage, incorporating current mirrors and a voltage boxing region to compensate for leakage currents and maintain accuracy across varying temperatures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If bipolar junction transistors (BJTs) are used to form bandgap references, then the reference voltage can be generated, but the circuit becomes sensitive to substrate noise and cannot achieve full isolation
Solution Approach 1:
The patent introduces an intermediate isolation structure (reverse-biased diode connection between substrate and well) that acts as a mediator to block substrate noise from reaching the transistor. This diode serves as an intermediary barrier that allows the transistor to function while protecting it from harmful substrate effects.
Solution Approach 2:
The patent employs a thin film or isolation layer structure that physically separates the transistor from the noisy substrate. This isolation layer acts as a protective barrier that blocks noise transmission while maintaining the electrical functionality of the reference circuit.
2Object-affected harmful factors
If CMOS devices are used with reverse junction isolation, then substrate noise isolation is improved, but the circuit complexity and fabrication process become more complex
Solution Approach 1:
The patent combines multiple functions into a single integrated structure. The isolation mechanism is merged with the transistor fabrication process itself, using the same doping and oxidation steps to create both the transistor and its isolation structure, thereby reducing overall fabrication complexity.
Solution Approach 2:
The patent designs a self-isolating structure where the transistor's own junctions and doping profiles automatically create the isolation effect. The reverse-biased diode connection is formed as part of the standard CMOS process, allowing the device to isolate itself from substrate noise without requiring additional complex fabrication steps.
3Use of energy by moving object
If standard gate transistors are used, then the circuit operates at lower voltages, but leakage currents increase and affect reference voltage accuracy at high temperatures
Solution Approach 1:
The patent modifies key parameters of the transistor operation, including the gate voltage, substrate bias, and doping concentrations, to optimize the balance between leakage current and threshold voltage. By adjusting these parameters, the circuit maintains low-voltage operation while achieving acceptable leakage levels and temperature stability.
Data Source
AI summary
A voltage reference includes a PMOS transistor including a gate and drain coupled to an input and a source coupled to a voltage node through a resistor, three PMOS transistors including gates coupled to the input and sources coupled to the voltage node through resistors, an n-type flipped-gate transistor including a gate and drain coupled to a PMOS transistor drain and a source coupled to a negative supply node, an NMOS transistor including a gate coupled to the n-type flipped-gate transistor gate, a drain coupled to a PMOS transistor drain, and a source coupled to an output, an NMOS transistor including a gate coupled to a PMOS transistor drain, a drain coupled to the output, and a source coupled to the negative supply node through a resistor, and an NMOS transistor including a drain coupled to the output and a gate and source coupled to the negative supply node.