Floated Peripheral Active Regions for Low-Leakage Memory Circuits
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Solution Overview
Problem
As semiconductor devices become more highly integrated, they face challenges in maintaining reliability and electrical performance due to reduced size and design rules, which impact operating characteristics.
Innovation Solution
The semiconductor memory devices feature active regions that are floated from the substrate, with bit lines acting as wirings, and apply different well biases to the cell array and peripheral circuit regions, enhancing transistor switching functions and reducing leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If semiconductor devices are highly integrated to increase operating speed and reduce power consumption, then productivity and energy efficiency are improved, but reliability and electrical performance deteriorate due to reduced size and design rules
Solution Approach 1:
The device is divided into separate cell array region and peripheral circuit region with distinct active region configurations. The cell array uses conventional substrate-connected active regions for high-density storage, while the peripheral circuit uses floated active regions isolated from the substrate to reduce leakage currents and improve switching characteristics, allowing each region to be optimized independently for its specific function
Solution Approach 2:
Different regions of the device are given different structural properties: the cell array region maintains traditional substrate-connected active regions for data storage functionality, while the peripheral circuit region implements floated active regions disconnected from the substrate to minimize leakage and enhance transistor switching performance in control circuits
2Productivity
If the size of MOS field effect transistor is reduced to achieve high integration, then productivity is improved, but electrical performance deteriorates due to scaling limitations
Solution Approach 1:
The active regions in the peripheral circuit are elevated above the substrate plane by forming them on an insulating layer, creating a vertical separation that isolates them from substrate effects. This dimensional change allows the transistors to operate with reduced leakage currents and improved electrical characteristics without requiring further lateral scaling
3Ease of manufacture
If active regions are connected to substrate for conventional device operation, then ease of manufacture is maintained, but leakage currents increase and reliability decreases
Solution Approach 1:
The active regions in the peripheral circuit are extracted from the substrate by forming them on an insulating layer, physically separating them from the substrate connection. This extraction eliminates the leakage current path through the substrate while maintaining electrical functionality through properly designed contact structures and gate connections
Data Source
AI summary
A semiconductor memory device includes; a substrate and an insulating layer on the substrate, first and second peripheral active regions on the insulating layer, each having a first surface and an opposing second surface, a device isolation layer between the first and second peripheral active regions to isolate the first and second peripheral active regions, a bit line connected to at least one of the first surface of the first peripheral active region and the first surface of the second peripheral active region, a first gate insulating layer provided on the second surfaces of the first and second peripheral active regions, a first peripheral gate electrode disposed on the first gate insulating layer and a second peripheral gate electrode disposed on the second gate insulating layer, and a contact pattern connected to the bit line, wherein each of the first peripheral active region and the second peripheral active region is floated in relation to the substrate by the insulating layer.