Floating-Body Memory Cell Using Back-Bias Impact Ionization

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As memory cells are scaled to smaller feature sizes, variability in their characteristics increases due to Random Dopant Fluctuation (RDF), affecting the reliability of semiconductor memory devices.

Innovation Solution

A semiconductor memory cell design featuring a floating body region with specific doping concentration levels and a back-bias region that generates impact ionization in one state but not in another, maintaining stable states through bipolar transistor action, thereby reducing variability and enhancing data retention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory cells are scaled to smaller feature sizes, then device density and integration are improved, but variability in cell characteristics increases due to Random Dopant Fluctuation

Engineering Contradiction:
Improvedevice densityVSAvoidcell characteristic variability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the physical and chemical parameters of the transistor structure by implementing an electrically floating body configuration where the body region is isolated from the substrate by an insulating layer. This structural parameter change eliminates the need for dopant atoms in the body region, thereby removing the source of Random Dopant Fluctuation and its associated variability in threshold voltage and other cell characteristics, while enabling continued scaling for higher density.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If conventional doped transistors are used, then manufacturing processes are well-established, but Random Dopant Fluctuation causes instability in memory cell states

Engineering Contradiction:
Improvemanufacturing process maturityVSAvoidmemory cell state stability
Core Design Contradiction:
Ease of manufactureVSStability of the object's composition

Solution Approach 1:

The patent extracts the dopant atoms from the transistor body region by isolating it with an insulating layer, creating an electrically floating body. This removal of dopants eliminates Random Dopant Fluctuation and its harmful effects on memory cell state stability, while the insulating layer can be integrated into existing manufacturing processes using standard isolation techniques.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design achieves reduced variability in memory cell characteristics and improved data retention by utilizing a bipolar transistor mechanism to maintain charge in the floating body region, ensuring stable states and efficient operation.

Implementation Method 1

a back-bias region configured to generate impact ionization when the memory cell is in one of the first and second states

Methodology Applied
Scientific EffectImpact ionization: Impact Force

Data Source

PatentUS20240260252A1Memory Device Having Electrically Floating Body Transistor
Publication Date: 2024.08.01 ZENO SEMICONDUCTOR INC
  • US20240260252A1 patent drawing
  • US20240260252A1 patent drawing
  • US20240260252A1 patent drawing

AI summary

A semiconductor memory cell includes a floating body region configured to be charged to a level indicative of a state of the memory cell selected from at least first and second states. A first region of the memory cell is in electrical contact with the floating body region. A second region of the memory cell is spaced apart from the first region and is also in electrical contact with the floating body region. A gate is positioned between the first and second regions. A back-bias region is configured to generate impact ionization when the memory cell is in one of the first and second states, and the back-bias region is configured so as not to generate impact ionization when the memory cell is in the other of the first and second states.