Floating-Body Memory Cell With Resistance-Change Data Retention
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Solution Overview
Problem
Current semiconductor memory devices either lose data when power is discontinued, as in volatile memory, or operate slowly, as in non-volatile memory, lacking a solution that combines fast operation with data retention.
Innovation Solution
A semiconductor memory cell with a capacitorless transistor and a resistance change element, such as a phase change material or metal-insulator-metal system, that stores data in a floating body and can switch between resistivity states to retain data when power is lost and restore it when power is restored.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If non-volatile memory is used to retain data without power, then data retention capability is improved, but operation speed deteriorates
Solution Approach 1:
The patent merges volatile and non-volatile memory functionalities into a single memory cell by integrating a floating body transistor (providing fast volatile-like operation) with a resistance change element (providing non-volatile data retention). This combination allows the memory to operate quickly like volatile memory while retaining data like non-volatile memory, resolving the speed-retention contradiction.
Solution Approach 2:
The memory cell is designed to perform multiple functions: it can operate as fast volatile memory during powered operation and automatically retain data when power is lost. The floating body transistor handles fast read/write operations while the resistance change element provides persistent storage, making the device universally applicable for both speed-critical and retention-critical applications.
2Speed
If a universal memory device combining volatile and non-volatile functionality is created, then data retention and fast operation are improved, but device size increases
Solution Approach 1:
The patent combines the volatile memory function (floating body transistor) and non-volatile memory function (resistance change element) into a single integrated memory cell structure. This merging eliminates the need for separate volatile and non-volatile memory devices, achieving universal functionality without proportionally increasing device size.
Solution Approach 2:
The resistance change element is integrated within the memory cell structure alongside the floating body transistor, creating a nested configuration where both functional components coexist in a compact arrangement. This nesting allows the dual-functionality to be achieved within a footprint comparable to conventional single-function memory cells.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables fast operation like volatile memory while retaining data like non-volatile memory, with the ability to switch between resistivity states for data storage and retrieval, enhancing data integrity and efficiency.
Implementation Method 1
a resistance change element configured to store data stored in the floating body under any one of a plurality of predetermined conditions
Implementation Method 2
the resistance change element comprises a phase change material
Implementation Method 3
a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to the cell
Data Source
AI summary
Semiconductor memory is provided wherein a memory cell includes a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to the cell. The cell further includes a nonvolatile memory comprising a resistance change element configured to store data stored in the floating body under any one of a plurality of predetermined conditions. A method of operating semiconductor memory to function as volatile memory, while having the ability to retain stored data when power is discontinued to the semiconductor memory is described.