Floating Body MOSFET Antifuse for Secure Data Storage

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Solution Overview

Problem

Conventional fuse elements with copper interconnects in integrated circuits face security risks due to void spaces created after melting and occupy large areas, while existing antifuse elements lack efficient methods for programming and data storage.

Innovation Solution

The use of floating body MOSFETs as antifuse elements, where a junction between the drain area and semiconductor well is broken to create a high resistance state without void creation, allowing for secure and compact data storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If copper wire fuse elements are used, then overcurrent protection function is achieved, but void spaces are created after melting causing security risks

Engineering Contradiction:
Improveovercurrent protection functionVSAvoidsecurity risks from void spaces
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the material parameter from copper wire to silicon-based semiconductor material, and changes the failure mode parameter from melting to junction breakdown. This transforms the fuse element from a metal conductor to a semiconductor device, eliminating the void space creation issue while maintaining the overcurrent protection function through controlled junction failure.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses a composite structure combining semiconductor materials (silicon well, source/drain regions) to create a fuse element that integrates both the protective function and the security requirement. The semiconductor composite structure allows for controlled breakdown without creating detectable void spaces.

Inventive Principle:
Principle #40Composite materials

2Reliability

If copper wire fuse elements are used, then overcurrent protection is provided, but large area is occupied by the fuse memory array

Engineering Contradiction:
Improveovercurrent protectionVSAvoidarea occupied by fuse memory array
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent changes the structural parameters by using vertically integrated semiconductor structures (silicon well, source/drain regions) that can be densely packed. This allows the fuse elements to occupy significantly less area compared to traditional copper wire fuse elements, enabling higher density memory arrays.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If conventional fuse elements are used, then simple structure is maintained, but security vulnerabilities and large area occupation occur

Engineering Contradiction:
Improvestructure simplicityVSAvoidsecurity vulnerabilities
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The semiconductor-based fuse element uses the inherent properties of semiconductor materials and junction breakdown mechanisms to achieve both security and functionality. The breakdown process itself creates the protective function without requiring additional security features, making the device self-sufficient and secure by design.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution provides secure data storage without void spaces and reduces the area occupied by memory arrays, enhancing the security and efficiency of integrated circuits.

Implementation Method 1

break the junction between the drain area and the semiconductor well to generate a current between the source area, the semiconductor well, and the drain area

Methodology Applied
Scientific EffectAvalanche breakdown: Avalanche Breakdown

Data Source

PatentUS11276697B2Floating body metal-oxide-semiconductor field-effect-transistors (MOSFET) as antifuse elements
Publication Date: 2022.03.15 INTEL CORP
  • US11276697B2 patent drawing
  • US11276697B2 patent drawing
  • US11276697B2 patent drawing

AI summary

Embodiments herein may describe techniques for an integrated circuit including a MOSFET having a semiconductor well, a source area and a drain area next to the semiconductor well, a gate electrode, and a base terminal. The gate electrode may be coupled to the base terminal, hence forming a floating body MOSFET. A junction may exist between the drain area and the semiconductor well. A first resistance may exist between the source area and the drain area through the semiconductor well. A programming operation may be performed when the gate electrode is coupled to a high impedance, a programming voltage is applied at the source area, and the drain area is coupled to a ground voltage to break the junction between the drain area and the semiconductor well to generate a current between the source area, the semiconductor well, and the drain area. Other embodiments may be described and/or claimed.