Floating Body Transistor Bracket Gate for Memory Resistance Matching
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Solution Overview
Problem
Current memory design faces challenges in increasing packing density, maintaining performance, improving stability, and reducing fabrication costs, particularly in matching the resistance of transistors with ferroelectric capacitors.
Innovation Solution
The development of floating body transistor structures with adjustable dimensions, incorporating gate structures configured as brackets with notches and semiconductor material bodies, which allow for tailored resistance matching with capacitors, enabling effective current flow and programming of memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional transistor structures are used, then fabrication processes are simpler, but resistance matching with ferroelectric capacitors is difficult and packing density is limited
Solution Approach 1:
The patent applies parameter changes by adjusting the dimensions of the floating body transistor components (channel width, channel length, body thickness) to precisely control and match the resistance characteristics with ferroelectric capacitors, resolving the resistance matching difficulty while maintaining fabrication feasibility
Solution Approach 2:
The patent introduces a vertical floating body structure that extends into the third dimension, allowing resistance control through body thickness adjustment in addition to planar dimensions, thereby achieving precise resistance matching without significantly increasing planar device complexity
2Quantity of substance
If packing density is increased, then more memory cells fit in the same area, but performance stability across the array deteriorates
Solution Approach 1:
The patent implements local quality by allowing each floating body transistor to have independently optimized dimensions (channel width, channel length, body thickness) tailored to its specific position and capacitor partner, ensuring consistent resistance matching and performance stability across the entire memory array even at high packing densities
3Manufacturing precision
If transistor dimensions are fixed, then fabrication is easier, but resistance matching with capacitors cannot be achieved
Solution Approach 1:
The patent employs parameter changes by making transistor dimensions (channel width, channel length, body thickness) adjustable parameters that can be tuned during fabrication to achieve the desired resistance matching with capacitors, balancing manufacturing complexity with performance requirements
Data Source
AI summary
Some embodiments include a floating body transistor which has a gate structure configured as a bracket having two upwardly-projecting sidewalls joined to a base. A region between the upwardly-projecting sidewalls is an interior region of the bracket. The interior region of the bracket has an interior surface along an upper surface of the base, and along inward surfaces of the upwardly-projecting sidewalls. The sidewalls are a first sidewall and a second sidewall. The first and second sidewalls have first and second notches, respectively, which extend downwardly into the first and second sidewalls. The first and second notches are horizontally aligned with one another. Dielectric material lines the interior surface of the bracket. A semiconductor material body is within the interior region of the bracket and along the dielectric material. The semiconductor material body has a third notch which is horizontally aligned with the first and second notches.