Floating Body Transistor Neuron for Neuromorphic Integration Density
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current neuromorphic computing systems face challenges in integrating neurons due to their complex circuitry, which occupies significant layout area and consumes high energy, limiting the density and cost-effectiveness of neuromorphic chips.
Innovation Solution
Implementing a neuron in a neuromorphic system using a vertical or horizontal transistor with a floating body layer, where charges are stored and released to produce a spike-type voltage signal, allowing for a single transistor to act as a neuron and improving integration and energy efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If a conventional neuron circuit is used to integrate charge and transmit spike signals, then the neuron can perform spike-type voltage signal transmission, but the layout area occupied by the neuron becomes very large (up to 20000 F2)
Solution Approach 1:
The patent merges the functions of charge accumulation (membrane capacitor) and threshold comparison (comparator circuit) into a single floating body transistor. The floating body layer serves as both the charge storage element and the threshold detection element, eliminating the need for separate external capacitors and comparator circuits. This consolidation reduces the neuron circuit from multiple discrete components to a single transistor device.
Solution Approach 2:
The floating body transistor performs multiple functions simultaneously: it accumulates charge in the floating body layer, compares the accumulated charge against a threshold voltage, and generates spike-type voltage signals when the threshold is exceeded. This multi-functional design allows a single device to replace what previously required separate specialized components for each function.
2Productivity
If a conventional neuron circuit with membrane capacitor and comparator is used, then the neuron can accumulate charge and transmit signals, but the integration density of neurons on the chip is limited
Solution Approach 1:
By combining the membrane capacitor and comparator circuit functions into the floating body transistor itself, the patent eliminates the need for separate external components. This integration dramatically reduces the area required per neuron, enabling higher integration density on the neuromorphic chip and allowing for larger scale implementations with more neurons per chip.
3Ease of manufacture
If external capacitors and comparator circuits are used for charge accumulation and threshold comparison, then the neuron operation is reliable, but the manufacturing process becomes complex and costly
Solution Approach 1:
The patent integrates charge accumulation and threshold comparison functions into the floating body transistor structure, eliminating the need for separate external capacitors and comparator circuits. This reduction in component count simplifies the manufacturing process, reduces assembly steps, and lowers production costs while maintaining reliable neuron operation.
4Use of energy by moving object
If conventional neuron circuits are used, then the neuron can perform spike signal transmission, but the energy consumption is high
Solution Approach 1:
By consolidating the neuron circuit into a single floating body transistor, the patent eliminates redundant components and their associated energy consumption. The direct coupling between charge accumulation in the floating body and threshold comparison reduces energy loss that would occur in separate stages, thereby lowering overall energy consumption while simplifying the circuit structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables increased neuron density and reduced energy consumption, potentially achieving integration of 4 F2 or less per neuron on the neuromorphic chip, eliminating the need for external capacitors and comparator circuits, and simplifying the manufacturing process.
Implementation Method 1
holes generated by impact ionization may be accumulated and the floating body layer may be formed
Data Source
AI summary
A structure and an operation of a transistor, which is a vertical transistor in which a nanowire-type floating body layer is vertically formed or a horizontal transistor in which a floating body layer is horizontally formed, and implements a spike operation of a neuron by storing and releasing charges inside the transistor, and a neuromorphic system using the same are provided. The vertical transistor includes a floating body layer in a form of a vertical nanowire vertically formed on a substrate, a source and a drain formed above and below the floating body layer, a gate insulating layer formed on the source and surrounding the floating body layer, a gate formed outside the gate insulating layer, and a contact metal being in contact with the source, the drain and the gate to input or output an electrical signal.


