Floating Bootstrap FET Driver Architecture for Multi-Level Converters
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Solution Overview
Problem
Conventional half-bridge integrated circuits with synchronous bootstrap circuits are not suitable for multi-level power converters as the SW node does not always switch to ground, leading to incomplete charging of bootstrap capacitors and improper functioning.
Innovation Solution
A universal power FET driver IC architecture that integrates a synchronous bootstrap circuit in an isolation well, allowing the capacitor to float with the switch node, enabling charging from a single ground-referenced supply and supporting various power converter topologies, including multi-level converters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a synchronous bootstrap circuit is used in conventional half-bridge ICs, then the high-side FET can be properly driven, but the circuit cannot be used in multi-level power converters where the SW node does not switch to ground
Solution Approach 1:
The patent creates a universal bootstrap circuit architecture that functions across multiple power converter topologies (half-bridge, multi-level, etc.) by eliminating the requirement for the SW node to switch to ground. The circuit uses a bootstrap capacitor connected between the SW node and a bootstrap reference node, allowing it to operate reliably in both conventional half-bridge and multi-level converter configurations.
Solution Approach 2:
Instead of requiring the SW node to switch to ground to charge the bootstrap capacitor (conventional approach), the patent inverts the reference point by using a bootstrap reference node that remains at a stable potential. This allows the capacitor to charge during the low-side FET on-state regardless of whether the SW node reaches ground potential, enabling multi-level converter compatibility.
2Reliability
If the SW node does not switch to ground in multi-level converters, then the bootstrap capacitor cannot fully charge, but forcing the low-side FET to switch to ground would alter the converter topology
Solution Approach 1:
The patent introduces a bootstrap reference node as an intermediary element that mediates between the SW node and the bootstrap capacitor. This reference node provides a stable charging reference that does not depend on the SW node reaching ground potential, allowing the capacitor to fully charge even in multi-level converters where the SW node operates at elevated potentials during certain switching states.
3Device complexity
If a diode is used in the bootstrap circuit, then the circuit is simple, but voltage drops occur that reduce the gate drive voltage
Solution Approach 1:
The patent extracts and removes the diode component from the bootstrap circuit, replacing it with an active switch (low-side FET) that can be precisely controlled. This eliminates the inherent voltage drop across the diode while maintaining circuit functionality, thereby preserving more voltage for the high-side FET gate drive.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables proper functioning of power FET drivers across different topologies by ensuring consistent capacitor charging, reducing voltage drops, and supporting multi-level converters.
Implementation Method 1
bootstrapping circuits make use of a bootstrap capacitor that charges during the on-state of the low-side FET of the half-bridge
Data Source
AI summary
A gate driver circuit which integrates a synchronous bootstrap circuit in an isolation well of an integrated circuit, such that the synchronous bootstrap capacitor connected to the synchronous bootstrap circuit (and to the corresponding switch node of a power converter) can float with the corresponding switch node. Due to this feature, the voltage on one synchronous bootstrapping capacitor can be used to charge the synchronous bootstrapping capacitor of another (higher level) synchronous bootstrap circuit in a separate isolation well connected to a different switch node. As a result, the supply voltages for the synchronous bootstrap circuits in different isolation wells can all be supplied from a single ground referenced supply Vdd.


