Floating Diffusion Capacitance Switching for Wider Dynamic Range
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Solution Overview
Problem
Existing photoelectric conversion devices face limitations in dynamic range expansion due to voltage dependency of MOS capacitance, leading to decreased linearity characteristics and saturation charge quantity, particularly in front surface irradiation type devices.
Innovation Solution
The solution involves connecting a metal-oxide semiconductor capacitive element and a wiring capacitive element in parallel via a capacitance addition transistor to the floating diffusion, allowing for switchable capacitance and improved charge-voltage conversion efficiency without degrading sensitivity or increasing the area restrictions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a MOS capacitive element is used to expand dynamic range, then capacitance is added to the floating diffusion, but voltage dependency of the capacitance degrades linearity characteristics
Solution Approach 1:
The patent segments the capacitive element into two distinct parts: a MOS capacitive element (first capacitive element) and a wiring capacitive element (second capacitive element). The MOS capacitive element provides voltage-dependent capacitance for dynamic range expansion, while the wiring capacitive element provides voltage-independent capacitance to maintain linearity. By separating these functions into distinct segments, the patent resolves the contradiction between adding capacitance and maintaining linearity characteristics.
2Area of stationary object
If the area of the photoelectric conversion portion is restricted, then device integration is improved, but saturation charge quantity decreases
Solution Approach 1:
The patent merges the first capacitive element (MOS capacitive element) and the second capacitive element (wiring capacitive element) into a combined capacitive structure connected to the floating diffusion. This merging allows the total capacitance to be the sum of both elements, enabling greater total capacitance and saturation charge quantity without increasing the photoelectric conversion portion area. The combined structure resolves the contradiction by providing additional charge storage capacity through the integrated capacitive elements.
3Measurement precision
If capacitance is added to expand dynamic range, then sensitivity is improved, but area restrictions limit further capacitance increase
Solution Approach 1:
The patent utilizes the wiring layer structure (third wiring layer and fourth wiring layer) to create the wiring capacitive element, effectively using the vertical dimension and interlayer space rather than horizontal plane area. This dimensional approach allows capacitance to be added without proportionally increasing the overall device area, as the wiring capacitive element is formed utilizing existing wiring layer configurations and interlayer insulation spaces.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the dynamic range and linearity characteristics while reducing sensitivity degradation and area restrictions, effectively addressing the limitations of previous technologies.
Implementation Method 1
a photoelectric conversion unit configured to convert light into charge
Implementation Method 2
a metal-oxide semiconductor capacitive element electrically connected to the floating diffusion via the capacitance addition transistor
Data Source
AI summary
There is provided a photoelectric conversion device including a photoelectric conversion unit, a floating diffusion, an amplification transistor, a capacitance addition transistor electrically connected to the floating diffusion. The photoelectric conversion device further includes a metal-oxide semiconductor (MOS) capacitive element and a wiring capacitive element that are electrically connected to the floating diffusion via the capacitance addition transistor.