Floating Diffusion Layout for Faster Charge Transfer in Photodetectors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
CMOS image sensors face slow charge transfer speed due to large p-n junction areas in photodetectors, which limits operational speed.
Innovation Solution
The design incorporates a non-linear transfer gate electrode shape and a non-rectangular floating diffusion region to reduce the average distance between the pinned photodiode layer and the floating diffusion region, enhancing charge transfer speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a large p-n junction area is used in a photodetector, then photosensitivity is increased, but charge transfer speed to the floating diffusion region decreases
Solution Approach 1:
The patent segments the large p-n junction area into multiple smaller photodetector elements, each with its own floating diffusion region. This segmentation allows each element to maintain fast charge transfer speed while the collective array preserves high photosensitivity. The charge transfer path is divided into multiple parallel channels rather than one long path.
Solution Approach 2:
The patent transitions from a single large planar p-n junction to a three-dimensional arrangement where multiple photodetector elements are stacked or arranged in layers above the floating diffusion region. This vertical dimensionality change reduces the lateral charge transfer distance while maintaining total photosensitive area through multi-layer configuration.
2Speed
If the distance between the pinned photodiode layer and the floating diffusion region is reduced, then charge transfer speed is enhanced, but the photosensitive area may be compromised
Solution Approach 1:
The patent utilizes vertical stacking to reduce lateral distance between the pinned photodiode layer and floating diffusion region. By arranging these components in the vertical dimension rather than spreading them horizontally, the charge transfer path is shortened while the horizontal photosensitive area is preserved or even expanded through multi-layer configuration.
Solution Approach 2:
The patent employs a nested structure where the floating diffusion region is positioned directly beneath the pinned photodiode layer in the vertical stack, with the transfer gate electrode nested between them. This nested arrangement minimizes the charge transfer distance while maintaining adequate photosensitive area at the top layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration increases the operational speed of the photodetector by reducing the maximum lateral separation distance between the pinned photodiode layer and the floating diffusion region, thereby improving charge transfer efficiency.
Implementation Method 1
These devices utilize an array of pixels (which may include photodiodes and transistors) to detect radiation using photogeneration of electron-hole pairs.
Implementation Method 2
Fast charge transfer to the floating diffusion region may increase the operational speed of a photodetector in CMOS image sensors.
Data Source
AI summary
A subpixel including at least one second-conductivity-type pinned photodiode layer that forms a p-n junction with a substrate semiconductor layer, at least one floating diffusion region, and at least one transfer gate stack structure. The at least one transfer gate stack structure may at least partially laterally surround the at least one second-conductivity-type pinned photodiode layer with a total azimuthal extension angle in a range from 240 degrees to 360 degrees around a geometrical center of the second-conductivity-type pinned photodiode layer. The at least one transfer gate stack structure may include multiple edges that overlie different segments of a periphery of the at least one second-conductivity-type pinned photodiode layer, and the floating diffusion region includes a portion located between the first edge and the second edge. In addition, multiple transfer gate stack structures and multiple floating diffusion regions may be present in the subpixel.