Floating Electrode Semiconductor Termination Structure
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Solution Overview
Problem
Conventional semiconductor devices face poor manufacturing efficiency due to the complexity of forming two layers of floating electrodes to suppress the influence of external electric charges, which increases the number of manufacturing processes.
Innovation Solution
A semiconductor device with a single layer of floating electrodes extending in the thickness direction and spaced at intervals, providing high capacitance to effectively mitigate the influence of external electric charges, while simplifying the manufacturing process by forming trenches in the insulating layer and etching a metal layer to create separated electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If two layers of floating electrodes are disposed with partial overlap to ensure high capacitance, then the influence of external electric charges is suppressed, but the number of manufacturing processes increases
Solution Approach 1:
The patent transitions from a planar two-layer electrode structure to a three-dimensional single-layer structure where electrodes extend in the thickness direction. This dimensional change allows the electrodes to achieve high capacitance through increased surface area in the vertical dimension rather than requiring multiple overlapping layers, thereby simplifying the manufacturing process while maintaining reliability
Solution Approach 2:
The patent merges the function of multiple layers into a single layer by extending electrodes vertically through the insulating layer. This consolidation achieves the same capacitance effect that previously required two separate layers with partial overlap, reducing the number of manufacturing steps while preserving the suppression of external electric charges influence
2Reliability
If two layers of floating electrodes are formed with partial overlap to increase capacitance, then external electric charges influence is reduced, but manufacturing efficiency decreases
Solution Approach 1:
The invention utilizes the thickness direction as an additional dimension to achieve high capacitance. By extending electrodes vertically through the insulating layer rather than stacking multiple horizontal layers, the structure achieves increased surface area and capacitance without requiring repeated deposition and patterning cycles, thereby improving manufacturing efficiency
Solution Approach 2:
The patent combines the capacitance-enhancing function of multiple layers into a single integrated layer structure. The vertical extension of electrodes within one layer achieves the same electrical effect as multiple overlapping layers, eliminating redundant manufacturing steps and improving productivity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses the influence of external electric charges on the semiconductor device, enhancing its withstand voltage properties while reducing manufacturing complexity and increasing efficiency.
Implementation Method 1
a capacitance of a capacitor constituted by each of the floating electrodes is high. That is, one layer of floating electrodes can ensure a high capacitance
Implementation Method 2
The influence of the electric field of the external electric charges into the semiconductor layer of the termination region can be suppressed by the floating electrodes
Data Source
AI summary
A semiconductor device which can suppress the influence of the external electric charge and can be efficiently manufactured is provided. The semiconductor device is provided with an active region in which a semiconductor element is disposed and a termination region between the active region and an edge surface of the semiconductor substrate. An insulating layer is disposed on at least a part of an upper surface of the termination region. A plurality of floating electrodes is disposed at an interval in the insulating layer in a direction from the active region toward the edge surface of the semiconductor substrate, and a width of the plurality of floating electrodes in a thickness direction of the semiconductor substrate is greater than a width of the plurality of floating electrodes in the direction from the active region toward the edge surface of the semiconductor substrate.