Floating Field Plate LDMOS Structure for Hot Carrier Control
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Solution Overview
Problem
Scaling drain extended transistors to reduce the half pitch dimension worsens channel hot carrier injection and reduces linear mode drain current performance, leading to reduced device reliability in high voltage applications.
Innovation Solution
Incorporating a floating field plate over the drain drift region, which is not conductively connected to any other structure, to mitigate channel hot carrier injection and maintain breakdown voltage performance without increasing specific resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If drain extended transistors are scaled to reduce half pitch dimension, then device integration density is improved, but channel hot carrier injection worsens and linear mode drain current performance is reduced
Solution Approach 1:
A floating field plate is introduced as an intermediary structure between the gate electrode and drain region. This field plate is positioned over the field relief dielectric layer and is not conductively connected to any other structure, allowing it to independently control the electric field distribution in the drain drift region. The field plate acts as a mediator that reduces channel hot carrier injection while maintaining breakdown voltage performance, enabling scaled dimensions without sacrificing reliability.
Solution Approach 2:
The field relief dielectric layer is designed with non-uniform thickness, being greater than the gate dielectric layer thickness in the drain drift region. This creates localized field relief exactly where needed to mitigate hot carrier effects. Additionally, the floating field plate is strategically positioned only over the field relief dielectric layer in specific regions, providing localized electric field control rather than uniform modification across the entire device structure.
2Reliability
If field relief dielectric layer thickness is increased to mitigate hot carrier injection, then channel hot carrier injection is reduced, but specific resistance increases
Solution Approach 1:
The field relief dielectric layer is designed with spatially varying thickness, being greater than the gate dielectric layer thickness specifically in the drain drift region where hot carrier injection occurs. This localized thickening provides field relief precisely where needed without uniformly increasing dielectric thickness across the entire device, thereby mitigating hot carrier effects while controlling specific resistance.
Solution Approach 2:
The floating field plate serves as an intermediary that further modulates the electric field in the drain drift region. By positioning the field plate over the already-thickened field relief dielectric layer, the structure creates a controlled potential distribution that reduces hot carrier injection without requiring excessive dielectric thickness that would increase specific resistance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The floating field plate enhances device reliability by reducing channel hot carrier injection and maintaining breakdown voltage performance, allowing for smaller half pitch dimensions without significant adverse impact on specific resistance.
Implementation Method 1
a floating field plate located over the field relief dielectric layer and between the gate electrode and the drain region... to mitigate channel hot carrier injection and maintain breakdown voltage performance
Implementation Method 2
a field relief dielectric layer over the drain drift region, the field relief dielectric layer extending from the gate dielectric layer toward the drain region and having a thickness greater than the gate dielectric layer
Data Source
AI summary
A semiconductor device includes a semiconductor layer over a semiconductor substrate with a body region and a drain drift region of opposite first and second conductivity types, a gate dielectric layer over the body region and extending over a junction between the body region and the drain drift region, a gate electrode over the gate dielectric layer, a drain region having the second conductivity type in the drain drift region, the drain region having a dopant density greater than a dopant density of the drain drift region, a field relief dielectric layer over the drain drift region, the field relief dielectric layer extending from the gate dielectric layer toward the drain region and having a thickness greater than the gate dielectric layer, and a floating field plate over the field relief dielectric layer and between the gate electrode and the drain, the field plate spaced apart from the gate electrode.