Floating-Gate Semiconductor Detector for Lithography Intensity Uniformity
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Solution Overview
Problem
Current semiconductor patterning processes face challenges in maintaining reliability and yield as feature sizes decrease, with existing methods for patterning material layers in semiconductor wafers being insufficient, especially in achieving uniformity of EUV/DUV light and e-beam intensity.
Innovation Solution
The development of high-density, powerless semiconductor detectors that utilize a configuration of transistors with floating gates to detect light and e-beam intensity, allowing for the adjustment of light sources based on electron variation in the gates, ensuring uniformity and optimizing patterning quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional detectors are used to detect light/e-beam intensity, then detection function is achieved, but power consumption occurs and power-related issues arise
Solution Approach 1:
The patent replaces conventional powered detection systems with a powerless semiconductor detector that utilizes the photoelectric effect and electron accumulation in floating gates to detect light and e-beam intensity. The detector uses voltage application to accumulate electrons in floating gates during initialization, then measures electron variation without requiring power during the actual detection process, thereby eliminating power-related issues while maintaining detection precision.
2Productivity
If feature size is decreased to increase device density, then manufacturing capacity increases, but patterning reliability and yield maintenance becomes more difficult
Solution Approach 1:
The patent implements feedback by using the powerless semiconductor detector to detect light and e-beam intensity, then adjusting the light source based on electron variation in the gates. This feedback mechanism ensures uniformity of light/e-beam intensity across the wafer surface, compensating for variations that become more critical as feature sizes decrease and device density increases, thereby maintaining patterning reliability.
Solution Approach 2:
The patent adjusts lithography parameters including the intensity and uniformity of light/e-beam based on detection data. By changing these parameters dynamically according to detected intensity variations, the system maintains optimal patterning conditions even as feature sizes decrease and manufacturing complexity increases.
3Manufacturing precision
If optical proximity correction and lithography parameter adjustment are used to mitigate defects, then some patterning defects are reduced, but the current systems are not entirely satisfactory and complexity increases
Solution Approach 1:
The patent employs a self-service approach where the powerless semiconductor detector automatically detects light/e-beam intensity and enables automatic adjustment of the light source based on electron variation. This self-regulating system reduces patterning defects and improves manufacturing precision without requiring complex external intervention or overly complicated control systems.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor detectors enable precise detection and adjustment of light/e-beam intensity, improving patterning quality and reliability by being powerless during detection, thus avoiding power-related issues and enhancing spatial resolution.
Implementation Method 1
When light from the light source illuminates the gate of the second transistor, electrons escape from the gate due to exposure of the light
Implementation Method 2
E-beam is impinged on the gate of the second transistor of the semiconductor detector
Data Source
AI summary
A method includes applying a first voltage to a source of a first transistor of a detector unit of a semiconductor detector in a test wafer and applying a second voltage to a gate of the first transistor and a drain of a second transistor of the detector unit. The first transistor is coupled to the second transistor in series, and the first voltage is higher than the second voltage. A pre-exposure reading operation is performed to the detector unit. Light of an exposure apparatus is illuminated to a gate of the second transistor after applying the first and second voltages. A post-exposure reading operation is performed to the detector unit. Data of the pre-exposure reading operation is compared with the post-exposure reading operation. An intensity of the light is adjusted based on the compared data of the pre-exposure reading operation and the post-exposure reading operation.