Floating-Gate Memory Discharge Structure Against Reverse Engineering
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Solution Overview
Problem
Conventional methods for protecting data in integrated circuit memories against reverse engineering are ineffective when the integrated circuit is not powered or if its functionality is destroyed, as they require activation or mechanical intervention to detect and prevent data recovery.
Innovation Solution
The implementation of capacitive structures comprising a first electrically-conducting body coupled to the floating gate and a second electrically-conducting body coupled to a ground terminal, with a dielectric body that electrically couples the floating gate to the ground terminal upon contact with an aqueous solution or exposure to charged particles, ensuring data loss without powering the integrated circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional protection methods are used, then data security is maintained when the integrated circuit is powered, but data can be recovered through reverse engineering when the circuit is not powered or functionality is destroyed
Solution Approach 1:
The patent applies preliminary anti-action by pre-configuring capacitive structures that automatically discharge the floating gate when exposed to reverse engineering techniques. The capacitive structures are designed in advance to detect the presence of aqueous solutions or charged particles and trigger data destruction before the attacker can successfully extract information, thus preventing the harmful action rather than responding to it after detection.
Solution Approach 2:
The patent converts harmful factors (aqueous solutions used in mechanical polishing, charged particles in FIB machining) into beneficial triggers for data protection. When these substances or particles contact the capacitive structures during reverse engineering attempts, they activate the discharge mechanism that destroys the stored data, thereby transforming the attacker's tools into the very means of protection.
2Difficulty of detecting and measuring
If mechanical polishing or FIB machining is performed to access memory cells, then physical access to data is achieved, but data can be extracted through PVC or EBIC techniques
Solution Approach 1:
The patent introduces capacitive structures as intermediary elements between the floating gate and the external environment. These intermediaries detect the presence of aqueous solutions or charged particles and mediate the interaction by triggering data discharge, thereby preventing direct access to the stored information through probing techniques while maintaining the appearance of normal memory structure.
3Object-affected harmful factors
If the integrated circuit functionality is destroyed to prevent detection, then protection against active attacks is improved, but passive reverse engineering can still recover data from non-volatile memories
Solution Approach 1:
The patent implements preliminary action by pre-configuring the capacitive structures to automatically discharge the floating gate when exposed to reverse engineering conditions, eliminating the need for active circuit functionality. The protection mechanism is already in place and activated by the mere presence of reverse engineering materials or methods, rather than requiring detection and response from a functional system.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively protects data by ensuring intrinsic loss of stored information during reverse engineering attempts, regardless of the method used, whether through mechanical polishing or focused ion beam machining, without requiring the integrated circuit to be functional.
Implementation Method 1
the dielectric body is configured for electrically coupling the floating gate and the ground terminal so as to modify the charge on the floating gate and to lose the corresponding data if an aqueous solution is brought into contact with the dielectric body
Implementation Method 2
exposure to charged particles, ensuring data loss without powering the integrated circuit
Data Source
AI summary
An integrated circuit memory includes a state transistor having a floating gate which stores a respective data value. A device for protecting the data stored in the memory includes a capacitive structure having a first electrically-conducting body coupled to the floating gate of the state transistor, a dielectric body, and a second electrically-conducting body coupled to a ground terminal. The dielectric body is configured, if an aqueous solution is brought into contact with the dielectric body, to electrically couple the floating gate and the ground terminal so as to modify the charge on the floating gate and to lose the corresponding data. Otherwise, the dielectric body is configured to electrically isolate the floating gate and the ground terminal.


