Floating-Gate Output Circuit for Lower Leakage and Voltage Stress
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Solution Overview
Problem
Existing electronic circuits face challenges with leakage current, voltage stress on transistors, and switching speed, particularly in high-frequency applications, affecting power consumption, reliability, and efficiency.
Innovation Solution
The electronic circuit incorporates complementary transistors with a control end in a floating state during specific durations, reducing voltage stress and leakage current by using a switch transistor that remains off during high voltage oscillations, allowing for larger and faster transistors to be used.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If transistors are operated under high voltage to improve switching speed, then switching speed is improved, but voltage stress on transistors increases
Solution Approach 1:
The patent applies the dynamics principle by making the control end of the output transistor dynamic through periodic floating during specific durations. This allows the transistor to operate under high voltage conditions when needed while periodically releasing voltage stress, thereby maintaining high switching speed without excessive continuous voltage stress on the transistor structure.
Solution Approach 2:
The patent implements periodic action by periodically placing the control end of the output transistor in a floating state during specific durations. This periodic floating creates intervals where voltage stress is reduced, allowing the transistor to sustain high voltage operation for improved switching speed while periodically relieving accumulated voltage stress to maintain reliability.
2Object-generated harmful factors
If transistors are made larger to reduce leakage current, then leakage current is reduced, but switching speed decreases
Solution Approach 1:
The patent applies dynamics by dynamically controlling the voltage state of the output transistor control end through periodic floating. This dynamic control allows larger transistors to be used for reduced leakage current while maintaining fast switching performance, as the periodic floating prevents voltage stress accumulation that would otherwise slow down switching in larger devices.
Solution Approach 2:
The patent changes the voltage parameter at the control end of the output transistor by periodically placing it in a floating state. This parameter change enables larger transistors to operate effectively by reducing voltage stress during critical periods, thereby maintaining fast switching speed while utilizing the lower leakage current characteristics of larger transistor structures.
3Reliability
If continuous voltage is applied to transistor control ends to maintain operation, then transistor reliability is maintained, but voltage stress accumulates reducing lifespan
Solution Approach 1:
The patent implements periodic action by periodically floating the control end of the output transistor during specific durations. This periodic floating creates regular intervals where voltage stress is released, preventing cumulative voltage stress buildup while maintaining transistor operational reliability through controlled voltage application during non-floating periods.
Solution Approach 2:
The patent applies beforehand cushioning by proactively introducing floating periods before voltage stress can accumulate to harmful levels. This preventive approach cushions against excessive voltage stress accumulation, thereby extending transistor lifespan while maintaining operational reliability through controlled voltage application during active periods.
Data Source
AI summary
An electronic circuit has an output circuit and a first switching transistor. The output circuit has at least one first output transistor. The at least one first output transistor has a control end, a first end, and a second end. The first switching transistor has a control end, a first end, and a second end. The at least one first output transistor and the first switching transistor are complementary transistors. The first end of the first switching transistor is coupled to the control end of the at least one first output transistor. During a specific duration, the first switching transistor is turned off, while the control end of the at least one first output transistor is in a floating state.