Sidewall-Oxidized Dielectric for Floating-Gate Coupling in Scaled Memory

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Solution Overview

Problem

The challenge of scaling down semiconductor devices while maintaining quality, yield, performance, and reliability is exacerbated by the complexity of reducing the size of semiconductor devices, which affects capacitive coupling and overall device efficiency.

Innovation Solution

The introduction of a laterally oxidized intervention layer with a higher oxygen concentration at its sidewall portion, enhancing the dielectric constant and improving capacitive coupling between the control and memory units.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the size of semiconductor devices is decreased to meet growing demand for computing power, then productivity and computing capacity are improved, but manufacturing precision and reliability deteriorate due to scaling challenges

Engineering Contradiction:
Improvecomputing powerVSAvoiddevice quality
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The intervention layer is designed with non-uniform oxygen concentration distribution, where the sidewall portion has higher oxygen concentration than the center portion. This local quality variation optimizes the dielectric constant specifically in regions where capacitive coupling is most critical, thereby improving manufacturing precision and reliability without requiring overall device size increase

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The oxygen concentration parameter is deliberately varied within the intervention layer to change its dielectric properties. By controlling the oxygen concentration gradient (higher at sidewalls, lower at center), the layer achieves enhanced capacitive coupling efficiency, allowing smaller device dimensions to maintain or improve performance

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If the size of semiconductor devices is decreased, then device density is improved, but capacitive coupling between control and memory units deteriorates

Engineering Contradiction:
Improvedevice densityVSAvoidcapacitive coupling
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The intervention layer exhibits spatially varying dielectric properties with higher oxygen concentration at sidewalls compared to the center. This local quality enhancement at critical coupling regions compensates for the reduced overall device dimensions, maintaining strong capacitive coupling between control and memory units despite increased device density

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The intervention layer functions as a composite dielectric structure with non-uniform composition (varying oxygen concentration). This composite approach allows optimization of capacitive coupling properties in specific regions while maintaining overall device miniaturization, resolving the contradiction between device density and coupling reliability

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances capacitive coupling, leading to improved performance and efficiency of the semiconductor device.

Implementation Method 1

a laterally oxidized intervention layer disposed over the floating gate... The laterally oxidized intervention layer comprises a sidewall portion and a center portion, wherein the sidewall portion has an oxygen concentration greater than that of the center portion

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS20250234538A1Semiconductor device with sidewall oxidized dielectric
Publication Date: 2025.07.17 NAN YA TECH
  • US20250234538A1 patent drawing
  • US20250234538A1 patent drawing
  • US20250234538A1 patent drawing

AI summary

The present application discloses a semiconductor device having a sidewall oxidized dielectric and a method for fabricating the same. The semiconductor device includes a substrate; a tunnel insulating layer disposed over the substrate; a floating gate disposed over the tunnel insulating layer; a laterally oxidized intervention layer disposed over the floating gate; and a control gate disposed over the laterally oxidized intervention layer. The laterally oxidized intervention layer includes a sidewall portion and a center portion, wherein the sidewall portion has an oxygen concentration greater than that of the center portion.