Floating-Gate Analog Circuits With Multi-Range Temperature Compensation
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Solution Overview
Problem
Existing analog circuitry with programmable circuit elements, such as floating-gate transistors, face significant temperature sensitivity issues due to the wide range of current values required, which is exacerbated by the limited availability of temperature-independent current sources on-chip.
Innovation Solution
The implementation of multiple control lines with dedicated temperature profiles for different operating ranges, allowing each programmable circuit element to connect to the control line with the closest matching temperature profile, thereby achieving temperature-insensitive operation across a wide range of currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single reference floating-gate transistor is used to generate temperature-compensated control voltages, then temperature compensation is achieved for currents similar to the reference current, but temperature sensitivity increases for currents that differ substantially from the reference current
Solution Approach 1:
The patent divides the single reference circuit into multiple reference floating-gate transistors, each operating at a different reference current level. This segmentation allows the system to cover a wide range of output currents (from 1 nA to 100 µA) while maintaining temperature compensation for each segment, resolving the contradiction between temperature compensation and current range coverage.
Solution Approach 2:
Each reference floating-gate transistor is optimized for a specific current range, creating local temperature compensation characteristics tailored to different operating conditions. The control-gate voltage from each reference is optimized for its specific current level, providing locally optimal temperature compensation rather than a single global solution.
2Reliability
If multiple temperature-independent current sources are provided on-chip, then temperature compensation can be achieved across a wide range of currents, but device complexity and area increase
Solution Approach 1:
The reference floating-gate transistors serve multiple functions: they generate temperature-compensated control voltages, define reference current levels, and provide biasing for the parameter floating-gate transistors. This multi-functionality reduces the need for separate temperature-independent current sources, decreasing device complexity while maintaining temperature compensation across wide current ranges.
Solution Approach 2:
The patent changes the operating parameters (reference current levels) of the reference floating-gate transistors to cover different current ranges. By adjusting the reference current parameter across multiple orders of magnitude, the system achieves wide current range coverage without requiring proportionally more complex circuitry.
3Reliability
If the charge on parameter floating-gate transistors is constrained to a narrow range, then temperature compensation is effective, but the range of programmable currents is limited
Solution Approach 1:
The patent segments the programmable current range into multiple decades, with each decade handled by a specific reference floating-gate transistor. This allows parameter floating-gate transistors to operate within narrow charge ranges relative to their assigned reference, maintaining temperature compensation accuracy while collectively covering a wide programmable current range across all segments.
Data Source
AI summary
According to some embodiments, re-programmable and/or reconfigurable analog circuitry may be provided. A plurality of reference floating-gate transistors are each programmable to be connectable to a plurality of global reference control lines of the analog circuitry to facilitate temperature compensation. In some embodiments, the plurality of analog nonvolatile memory cells are associated with parameter floating-gate transistors. Moreover, the plurality of analog parameter nonvolatile memory cells may be programmed to several orders of parameter magnitude.


