Floating Gate Test Structure for Charged Particle Monitoring
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Solution Overview
Problem
Current test structures for detecting charged particles in semiconductor processes are complex and costly, failing to effectively monitor production wafers and reflect the status of semiconductor devices accurately.
Innovation Solution
A simplified test structure comprising a semiconductor substrate with doped regions, an insulating layer, and a conductive layer in a floating state, where the conductive layer partially overlaps the doped regions, allowing for the measurement of breakdown voltage shifts to indicate charged particle accumulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a complicated test structure such as E2PROM is used to detect charged particles, then the detection capability is improved, but the manufacturing cost increases
Solution Approach 1:
The test structure is segmented into essential functional components only: a semiconductor substrate with doped regions, insulating layer, and floating conductive layer. This segmentation removes unnecessary complex structures while retaining the core detection function for charged particles, thereby reducing manufacturing cost without significantly compromising detection capability.
Solution Approach 2:
The invention extracts and retains only the essential elements needed for charged particle detection from complex structures like E2PROM. By taking out the core detection mechanism (doped regions, insulating layer, floating conductive layer) and eliminating redundant components, the structure becomes simpler and less costly while maintaining detection functionality.
2Device complexity
If a simplified test structure is used to reduce manufacturing cost, then the cost decreases, but the detection accuracy may be compromised
Solution Approach 1:
The simplified test structure employs local quality optimization by carefully designing the doping concentrations and profiles in specific regions. The doped regions are engineered with precise local properties to ensure adequate detection sensitivity, while other parts of the structure remain simple. This allows cost reduction through simplification without sacrificing detection accuracy in critical areas.
Solution Approach 2:
The invention utilizes parameter changes in the floating conductive layer and doped regions to enhance detection capability within the simplified structure. By adjusting parameters such as layer thickness, doping concentration, and material properties, the structure achieves effective charged particle detection despite its simplicity, maintaining accuracy while reducing complexity.
3Reliability
If monitoring wafers are used to detect process divergence, then the process stability monitoring is improved, but the ability to reflect production wafer status is reduced
Solution Approach 1:
The simplified test structure is designed with universality to serve multiple functions: it can be used for both process stability monitoring and production wafer status reflection. The same basic structure (doped regions, insulating layer, floating conductive layer) can be applied across different wafer types and process conditions, making it adaptable while maintaining reliable detection capabilities.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces manufacturing costs, integrates easily into semiconductor processes, and enhances detection signals by plotting I-V curves, enabling effective monitoring of charged particles on production wafers.
Implementation Method 1
a breakdown voltage (Vbd) between the first doped region and the second doped region is measured
Data Source
AI summary
A monitoring method of a semiconductor process includes the following steps. A semiconductor substrate is provided, and a test structure is formed thereon. The method of forming the test structure includes the following steps. A first doped region and a second doped region are formed in the semiconductor substrate, and an insulating layer is formed on the semiconductor substrate. Subsequently, a conductive layer is directly formed on the insulating layer to complete the formation of the test structure, in which the conductive layer in a floating state partially overlaps the first doped region and partially overlaps the second doped region. Then, a voltage signal is applied to the test structure and the breakdown voltage (Vbd) between the first doped region and the second doped region is measured.