Floating Gate Formation Using a Trapezoidal Sacrificial Pattern
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Solution Overview
Problem
The formation of voids in the floating gate of flash memory devices reduces the reliability and manufacturing yield of memory devices, which is a challenge in current manufacturing processes.
Innovation Solution
A method for forming a semiconductor structure involves creating a sacrificial pattern with a trapezoidal profile, where the upper portion is wider than the lower portion, which reduces the likelihood of void formation when replacing the sacrificial pattern with a gate electrode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional manufacturing process is used to form the floating gate, then the manufacturing process is simple, but voids are formed in the floating gate which reduces reliability and manufacturing yield
Solution Approach 1:
The sacrificial pattern is formed with a trapezoidal profile in advance, with the upper portion wider than the lower portion. This preliminary geometric configuration prevents void formation during subsequent gate electrode filling, as the wider upper portion provides sufficient space for complete material deposition without trapping voids.
Solution Approach 2:
The shape parameter of the sacrificial pattern is changed from a conventional rectangular profile to a trapezoidal profile with specific width ratios. The upper width is designed to be greater than the lower width, creating a geometric configuration that eliminates void formation during gate electrode formation while maintaining process feasibility.
2Productivity
If the sacrificial pattern is replaced with a gate electrode, then the gate electrode is formed, but voids may form in the gate electrode reducing manufacturing yield
Solution Approach 1:
The sacrificial pattern is pre-formed with a trapezoidal profile where the upper portion width exceeds the lower portion width. This preliminary geometric design ensures that when the gate electrode material is deposited, there is adequate space throughout the structure, preventing void formation and ensuring complete filling, thus improving manufacturing yield and electrode quality.
Solution Approach 2:
The sacrificial pattern employs an asymmetric trapezoidal geometry rather than a symmetric rectangular shape. The upper width is specifically designed to be greater than the lower width, creating an asymmetric profile that facilitates complete gate electrode material deposition without void formation, thereby improving both productivity and product quality.
Data Source
AI summary
A method for forming a semiconductor structure includes providing a semiconductor substrate, forming a sacrificial layer over the semiconductor substrate, etching the sacrificial layer to form a sacrificial pattern, etching the semiconductor substrate using the sacrificial pattern as an etching mask to form an active region of the semiconductor substrate, trimming the sacrificial pattern, and replacing the trimmed sacrificial pattern with a gate electrode.