Floating-Point MAC Precision Switching for Low-Power Dot Products
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Solution Overview
Problem
Existing integer architectures face challenges in performing scalable and efficient dot product computations between large floating-point multiplicands, particularly due to the scaling of multiplication and addition operations and the fixed precision of accumulators, which leads to increased complexity and power consumption.
Innovation Solution
A pipelined floating-point multiplier-accumulator architecture that includes sign, exponent, and mantissa processors, which dynamically adjust precision based on exponent differences and perform normalization, padding, and shifting to optimize operations and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If full precision accumulation is used for all floating point operations, then measurement precision is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent implements dynamic precision adjustment by detecting the exponent difference between accumulated value and incoming floating point number. When the exponent difference exceeds a threshold, the system automatically reduces accumulation precision by truncating less significant bits, thereby adapting the computational precision to the actual numerical range being processed and reducing operational complexity.
Solution Approach 2:
The system changes the precision parameter dynamically based on the exponent difference. By monitoring the relationship between the exponent of the accumulated value and the exponent of the incoming number, the system adjusts the number of bits used for accumulation, switching between full precision and reduced precision modes to optimize the trade-off between accuracy and complexity.
2Measurement precision
If full precision accumulation is used for all floating point operations, then measurement precision is improved, but power consumption increases
Solution Approach 1:
The patent implements dynamic precision adjustment by detecting the exponent difference between accumulated value and incoming floating point number. When the exponent difference exceeds a threshold, the system automatically reduces accumulation precision by truncating less significant bits, thereby adapting the computational precision to the actual numerical range being processed and reducing operational complexity.
Solution Approach 2:
The system changes the precision parameter dynamically based on the exponent difference. By monitoring the relationship between the exponent of the accumulated value and the exponent of the incoming number, the system adjusts the number of bits used for accumulation, switching between full precision and reduced precision modes to optimize the trade-off between accuracy and complexity.
3Device complexity
If fixed precision accumulation is used, then device complexity is reduced, but measurement precision deteriorates when multiplicands are of sufficiently different order
Solution Approach 1:
The patent implements dynamic precision adjustment by detecting the exponent difference between accumulated value and incoming floating point number. When the exponent difference exceeds a threshold, the system automatically reduces accumulation precision by truncating less significant bits, thereby adapting the computational precision to the actual numerical range being processed and reducing operational complexity.
4Measurement precision
If high precision accumulation is used, then measurement precision is improved, but speed decreases due to increased operation complexity
Solution Approach 1:
The patent implements dynamic precision adjustment by detecting the exponent difference between accumulated value and incoming floating point number. When the exponent difference exceeds a threshold, the system automatically reduces accumulation precision by truncating less significant bits, thereby adapting the computational precision to the actual numerical range being processed and reducing operational complexity.
Data Source
AI summary
A floating point multiplier-accumulator (MAC) multiplies and accumulates N pairs of floating point values using N MAC processors operating simultaneously, each pair of values comprising an input value and a coefficient value to be multiplied and accumulated. The pairs of floating point values are simultaneously processed by the plurality of MAC processors, each of which output a signed integer form fraction with a first bitwidth and a second bitwidth, along with a maximum exponent. The first bitwidth signed integer form fractions are summed by an adder tree using the first bitwidth to form a first sum, and when an excess leading 0 condition is detected, a second adder tree operative on the second bitwidth integer form fractions forms a second sum. The first sum or second sum, along with the maximum exponent, is converted into floating point result.


