Floating Active Region Memory Structure for Leakage Isolation
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Solution Overview
Problem
As semiconductor devices become more highly integrated to meet demands for higher operating speeds and lower power consumption, their reliability decreases, and existing methods struggle to maintain performance and reliability due to the scaling down of MOS field effect transistors.
Innovation Solution
The semiconductor memory device design features active regions that are floated from the substrate using an insulating layer, with bit lines and gate electrodes positioned on the active regions, allowing for improved electrical performance and reliability by preventing leakage current and depletion regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If MOS field effect transistors are scaled down to increase integration, then higher operating speed and lower power consumption are achieved, but reliability decreases due to increased leakage current and degraded electrical characteristics
Solution Approach 1:
The patent extracts the active region from the substrate by forming an insulating layer between them, creating a floating active region structure. This separation removes the harmful interaction between the active region and substrate, preventing leakage current while maintaining the benefits of scaled-down transistor dimensions for high integration.
Solution Approach 2:
An insulating layer is introduced as an intermediary between the active region and substrate. This intermediate layer acts as a barrier that prevents direct electrical contact, thereby eliminating leakage paths and depletion regions that would otherwise form at the substrate interface, while allowing the transistor to maintain its scaled dimensions.
2Strength
If active regions are connected to substrate, then structural support is provided, but leakage current and depletion regions form reducing electrical performance
Solution Approach 1:
The active region is extracted from direct contact with the substrate through the formation of an insulating layer, creating a floating structure. This extraction eliminates the formation of depletion regions and leakage current paths while the insulating layer itself provides the necessary structural support.
Solution Approach 2:
The electrical parameter of the substrate-active region interface is changed from conductive to insulating by introducing an insulating layer. This parameter change transforms the interface from a source of leakage current to a supportive structural element that maintains electrical isolation.
Data Source
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AI summary
A semiconductor memory device includes: a substrate and an insulating layer on the substrate, first and second peripheral active regions on the insulating layer, each having a first surface and an opposing second surface, a device isolation layer between the first and second peripheral active regions to isolate the first and second peripheral active regions, a bit line connected to at least one of the first surface of the first peripheral active region and the first surface of the second peripheral active region, a first gate insulating layer provided on the second surfaces of the first and second peripheral active regions, a first peripheral gate electrode disposed on the first gate insulating layer and a second peripheral gate electrode disposed on the second gate insulating layer, and a contact pattern connected to the bit line, wherein each of the first peripheral active region and the second peripheral active region is floated in relation to the substrate by the insulating layer.