Floating Net Inspection via Voltage Level Measurement
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Solution Overview
Problem
Conventional methods for inspecting floating nets in integrated circuit design are not entirely accurate, as they fail to detect floating gates connected to only one terminal of a capacitor or resistor, and do not account for the floating state of other resistor terminals.
Innovation Solution
A floating net inspection method that involves providing a netlist describing a circuit with transistors, coupling power supply and signal input ports to voltage sources, generating test voltages higher than a reference voltage, and determining if connecting nodes are floating based on voltage levels, with the option to revise the netlist upon detection of floating nodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If conventional EDA tool inspection methods are used to detect floating nets, then inspection can be performed prior to layout, but the inspection accuracy is insufficient and floating gates connected to capacitor or resistor terminals are not correctly identified
Solution Approach 1:
The patent changes the inspection parameter from simple connectivity checking to voltage level measurement. By applying test voltages and measuring actual voltage levels at transistor gates, the method can accurately detect floating nodes even when connected to capacitor or resistor terminals, resolving the inaccuracy of conventional methods while maintaining early inspection capability
Solution Approach 2:
The patent replaces the conventional EDA tool's logical connectivity inspection mechanism with a simulated electrical voltage measurement mechanism. Instead of checking netlist connections, the method applies test voltages and measures voltage levels to detect floating nodes, achieving higher accuracy by substituting logical analysis with electrical behavior simulation
Data Source
AI summary
A floating net inspection method includes: providing a netlist which describes a circuit structure of an application circuit, the application circuit including a plurality of transistors; coupling a power supply port and a signal input port of the application circuit to voltage sources, respectively; generating test voltages respectively through the voltage sources, such that the test voltages are applied to the transistors, the test voltages being larger than a reference voltage; and determining whether a connecting node of one of the transistors is floating on the basis of whether a voltage of the connecting node is larger than the reference voltage.


