Floating Receiver Node Biasing for Offset Cancellation

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Solution Overview

Problem

Proximity communication systems face challenges in achieving reliable signal detection due to floating receiver nodes experiencing DC wander and significant offset voltages, which reduce signal integrity and require large input transistors, leading to performance bottlenecks and increased power consumption.

Innovation Solution

The system employs a large resistive element to connect floating nodes to a predetermined potential, using MOS transistors as resistive elements, and implements negative feedback circuits to cancel offset voltages, thereby reducing the loading on sensitive nodes and improving signal sensitivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If floating receiver nodes are used in proximity communication systems, then DC isolation between chips is achieved, but DC wander and offset voltages occur at the receiver nodes

Engineering Contradiction:
ImproveDC isolationVSAvoidsignal detection accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

A large resistive element (≥1 GΩ) is introduced as an intermediary component to connect the floating receiver node to a predetermined potential. This resistor acts as a mediator that provides a DC reference path without significantly loading the capacitive coupling circuit, thereby eliminating DC wander and offset voltages while maintaining signal integrity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Stability of the object's composition

If large resistive elements are used to connect floating nodes to predetermined potential, then DC wander is reduced, but loading on sensitive nodes increases

Engineering Contradiction:
ImproveDC potential stabilityVSAvoidnode loading
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The resistance value is optimized to be extremely large (≥1 GΩ) to minimize the loading effect on the sensitive receiver node. By changing the resistance parameter to this extreme value, the circuit achieves both DC stability and minimal interference with the capacitive coupling signal

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If offset cancellation circuits are implemented, then signal sensitivity is improved, but circuit complexity increases

Engineering Contradiction:
Improvesignal sensitivityVSAvoidcircuit structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The offset cancellation function is extracted and implemented separately through a dedicated large resistive element connected to a predetermined potential, rather than integrating it into the main signal path. This separate implementation simplifies the overall circuit structure while effectively canceling offset voltages

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively cancels offset voltages, enhancing the sensitivity and performance of proximity communication systems by reducing the impact of offset voltages on receiver nodes, allowing for higher reliability and lower power consumption.

Implementation Method 1

connecting a floating input node of a receiver to a predetermined potential through a large resistive element, having a resistance of at least one gigaohm

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Implementation Method 2

two capacitive coupling circuits 22, 24 between the two chips 10, 14 for the differential signal to be coupled between them

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS8818271B2Offset cancellation for DC isolated nodes
Publication Date: 2014.08.26 ORACLE INT CORP
  • US8818271B2 patent drawing
  • US8818271B2 patent drawing
  • US8818271B2 patent drawing

AI summary

Offset voltages developed on floating nodes on inputs to high-performance amplifiers that are DC isolated from the data signals input to amplifiers are cancelled by connecting a highly resistive element between the input node and a predetermined potential, particularly useful in proximity communication systems in which two chips are connected through capacitive or inductive coupling circuits formed jointly in the two chips. The resistive element may be an off MOS transistor connected between the node and a desired bias voltage or a MOS transistor with its gate and drain connected to the potential. Multiple bias voltages may be distributed to all receivers and locally selected by a multiplexer for application to one or two input nodes of the receiver. The receiver output can also serve as a predetermined potential when the resistive element has a long time constant compared to the data rate or the resistive element is non-linear.