Circuit Board Floating Pattern Layout for FEXT Reduction

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Solution Overview

Problem

Mutual inductance between signal terminals causes far-end crosstalk (FEXT), impairing signal integrity and interfering with high-speed operation in memory modules.

Innovation Solution

Incorporation of a floating pattern embedded in the insulating layer of a circuit board, overlapping and electrically disconnected from signal terminals, to create mutual capacitance and reduce far-end crosstalk noise without affecting existing wires or increasing design costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If signal terminals are arranged closely to increase wiring density, then productivity and space utilization are improved, but far-end crosstalk noise increases due to mutual inductance

Engineering Contradiction:
Improvewiring densityVSAvoidfar-end crosstalk noise
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

A floating pattern is introduced as an intermediary element between signal terminals. This floating pattern is electrically disconnected from all circuits but creates mutual capacitance with adjacent signal terminals, thereby reducing far-end crosstalk noise while allowing signal terminals to be arranged closely for high wiring density

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the electrical parameter configuration by adding a floating pattern that modifies the mutual capacitance between signal terminals. This parameter change reduces the mutual inductance effect and thereby decreases far-end crosstalk noise without requiring increased spacing between terminals

Inventive Principle:
Principle #35Parameter changes

2Reliability

If floating pattern is added to reduce far-end crosstalk, then signal integrity is improved, but device complexity increases

Engineering Contradiction:
Improvesignal integrityVSAvoidcircuit board structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The floating pattern is implemented as a simple, inexpensive conductive structure that does not require electrical connection to functional circuits. It serves its noise reduction purpose and can be integrated into existing circuit board layouts without adding significant complexity or cost

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Object-affected harmful factors

If floating pattern is embedded in insulating layer, then far-end crosstalk is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvefar-end crosstalk noiseVSAvoidpattern positioning accuracy
Core Design Contradiction:
Object-affected harmful factorsVSManufacturing precision

Solution Approach 1:

The floating pattern is designed to be electrically disconnected and self-contained within the insulating layer. It serves its noise reduction function through its geometric configuration and proximity to signal terminals without requiring precise electrical connections or complex manufacturing processes

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The floating pattern effectively reduces far-end crosstalk noise and improves signal integrity by maximizing mutual capacitance between signal terminals while maintaining sufficient wiring space and avoiding additional design changes.

Implementation Method 1

the floating pattern effectively reduces far-end crosstalk noise and improves signal integrity by maximizing mutual capacitance between signal terminals

Methodology Applied
Scientific EffectMutual capacitance: Capacitance

Data Source

PatentEP4658000A1Circuit board, semiconductor module and semiconductor system
Publication Date: 2025.12.03 SAMSUNG ELECTRONICS CO LTD
  • EP4658000A1 patent drawingFigure 1
  • EP4658000A1 patent drawingFigure 2
  • EP4658000A1 patent drawingFigure 3

AI summary

A circuit board (100) includes: an insulating layer (110) configured to have a first surface (111) and a second surface (112) opposite to each other; first terminals (121) positioned on the first surface (111) of the insulating layer (110) and configured to include a first signal terminal (121S1) and a second signal terminal (121S2); and a first floating pattern (131) embedded in the insulating layer (110), configured to have a region overlapping each of the first signal terminal (121S1) and the second signal terminal (121S2), and electrically disconnected from the first signal terminal (121S1) and the second signal terminal (121S2).