Floating Input Pin Logic Control in Semiconductor ICs
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Solution Overview
Problem
Unused input/output (I/O) pins in semiconductor integrated circuits (ICs) left in a floating state can cause unexpected logic behavior and excess current draw, leading to potential circuit issues.
Innovation Solution
Implementing a semiconductor integrated circuit with a pull-up and pull-down circuit using P-type and N-type transistor logic blocks to manage the floating state of I/O pins, generating pull-up and sink currents to control the logical behavior of these pins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If I/O pins are left unconnected to voltage source or ground, then device complexity is reduced, but unexpected logic behavior and excess current draw occur
Solution Approach 1:
The semiconductor device automatically detects floating I/O pins and activates internal pull-up or pull-down circuits without external intervention. The detection circuit monitors pin states and triggers appropriate termination resistance activation, enabling the device to self-manage floating pins without requiring external resistors or complex external circuitry.
Solution Approach 2:
The device performs preliminary detection of floating pin states during initialization or before normal operation begins. By detecting and managing floating pins in advance, the system prevents unexpected logic behavior and current draw before they can affect circuit operation, rather than reacting to problems after they occur.
2Reliability
If internal pull-up or pull-down resistor circuits are added, then floating state is managed, but device complexity and manufacturing cost increase
Solution Approach 1:
The detection circuit serves multiple functions: it identifies floating pins, determines whether pull-up or pull-down termination is needed, and activates the appropriate circuit. This multi-functional approach consolidates what would otherwise require separate detection and control circuits, reducing overall device complexity while maintaining reliable floating pin management.
Solution Approach 2:
The patent combines the detection circuit and termination resistance activation into an integrated system where the detection circuit directly controls the activation of appropriate pull-up or pull-down resistors. By merging these functions into a unified circuit architecture, the design reduces the number of discrete components and simplifies the overall device structure.
3Reliability
If external pull-up or pull-down resistors are used, then floating I/O pins are managed, but ease of manufacture is reduced
Solution Approach 1:
The semiconductor device includes built-in detection circuits that automatically identify floating I/O pins and activate internal termination resistors without requiring external components. This self-service capability eliminates the need for external pull-up or pull-down resistors, simplifying assembly and manufacturing processes while maintaining reliable I/O pin state control.
Solution Approach 2:
The patent extracts the floating pin management function from the external circuit domain and integrates it into the semiconductor device itself. By taking out the need for external resistors and incorporating the termination functionality internally, the design simplifies manufacturing by reducing the number of external components and assembly steps required.
Data Source
AI summary
A semiconductor integrated circuit, comprising: an input pin; a switch having a drain terminal electrically connected to the input pin, and configured to be in an ON mode or an OFF mode, responsive to a state of the input pin; a first logic block electrically connected to a gate terminal of the switch and a source terminal of the switch; a second logic block electrically connected to the gate terminal of the switch; and a first node electrically connected to the first logic block, the second logic block, and the gate terminal of the switch.