Floating-Point Hardware Accelerator Using Mantissa Lookup Interpolation
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Solution Overview
Problem
Machine learning operations in floating-point format require extensive circuitry and processing time, making hardware accelerators expensive and inefficient.
Innovation Solution
A programmable datapath processor design that separates exponent and mantissa processing in floating-point data, using standard arithmetic for exponents and a lookup table with interpolation for mantissas to reduce hardware complexity and processing time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If floating-point format is used for machine learning operations, then large dynamic ranges of values are covered, but hardware cost and processing time increase significantly
Solution Approach 1:
The floating-point number is segmented into three independent parts: sign bit, exponent, and mantissa. Each part is processed separately through dedicated logic circuits (sign logic circuit, arithmetic logic circuit, interpolation logic circuit), allowing parallel processing and reducing overall hardware complexity while maintaining full floating-point functionality
Solution Approach 2:
The patent extracts and processes the exponent and mantissa separately using different methods. The exponent is handled by standard arithmetic operations in the arithmetic logic circuit, while the mantissa uses a simplified lookup table with interpolation approach, removing the need for complex full floating-point arithmetic units
2Adaptability or versatility
If floating-point format is used for machine learning operations, then large dynamic ranges of values are covered, but processing time increases
Solution Approach 1:
Lookup tables are pre-computed and stored during system initialization or fabrication, containing pre-calculated mantissa values for various exponent combinations. During actual machine learning operations, the hardware only needs to perform simple indexing and interpolation on these pre-computed values, dramatically reducing processing time compared to real-time floating-point calculations
Solution Approach 2:
The patent replaces complex mechanical floating-point arithmetic operations with a combination of simple arithmetic logic circuit operations and lookup table queries. This substitution transforms time-consuming sequential floating-point calculations into faster parallel operations involving integer arithmetic and memory access
3Device complexity
If lookup table with interpolation is used for mantissa processing, then hardware complexity is reduced, but memory usage increases
Solution Approach 1:
Different parts of the floating-point processing use different approaches optimized for their specific requirements: sign bits use simple logic circuits, exponents use arithmetic logic circuits with standard operations, and mantissas use lookup tables with interpolation. This localized optimization reduces overall hardware complexity while managing memory usage through targeted application of the lookup table approach only where needed
Data Source
AI summary
A device includes a memory storing a first lookup table of entries each comprising a starting index value and a number of samples corresponding to a respective segment of a function and a second lookup table of entries each comprising a respective sampled mantissa from the function. An interpolation logic circuit retrieves from the first lookup table a starting index value and a number of samples corresponding to a segment of the function corresponding to an input mantissa from an input floating-point element, retrieves from the second lookup table a first sampled mantissa and a second sampled mantissa based on the starting index value and the number of samples retrieved from the first lookup table and the input mantissa, and interpolates an output mantissa.