Floating Point Argument Reduction Circuitry for Inhibiting Roundoff Error
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Solution Overview
Problem
Existing floating point computations, such as logarithm calculations in graphics processing units, face challenges in maintaining accuracy due to roundoff errors, particularly when using argument reduction steps, which often require multi-precision arithmetic or large lookup tables.
Innovation Solution
The use of reciprocal estimation circuitry to determine a constrained reciprocal value, combined with argument reduction circuitry, inhibits roundoff error by limiting the magnitude and error bound of the reciprocal value, allowing for accurate floating point operations without multi-precision arithmetic.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multi-precision arithmetic is used to perform argument reduction without roundoff error, then computation accuracy is improved, but device complexity and manufacturing cost increase significantly
Solution Approach 1:
The patent changes the parameter of reciprocal representation by constraining both the magnitude and error bound of the reciprocal value to specific ranges. This parameter transformation allows standard floating-point arithmetic to achieve accuracy comparable to multi-precision methods without the associated complexity
Solution Approach 2:
The patent replaces expensive multi-precision arithmetic operations with cheaper constrained floating-point operations. By using readily available floating-point units with added constraints on reciprocal values, the system achieves high accuracy without investing in complex multi-precision circuitry
2Speed
If power-of-two scaling with piecewise-cubic approximation is used, then computation speed is improved, but manufacturing precision deteriorates due to large lookup table requirements
Solution Approach 1:
The patent transforms the problem by changing parameters (constraining magnitude and error bound of reciprocal) rather than relying on large lookup tables with piecewise-cubic functions. This approach maintains computational speed while achieving the required precision without excessive memory requirements
Solution Approach 2:
The patent extracts and constrains the critical error-prone component (reciprocal value) to specific magnitude and error bound ranges. By isolating and controlling this key parameter, the system achieves accuracy without needing large lookup tables
Data Source
AI summary
An apparatus and method are provided for inhibiting roundoff error in a floating point argument reduction operation. The apparatus has reciprocal estimation circuitry that is responsive to a first floating point value to determine a second floating point value that is an estimated reciprocal of the first floating point value. During this determination, the second floating point value has both its magnitude and its error bound constrained in dependence on a specified value N. Argument reduction circuitry then performs an argument reduction operation using the first and second floating point values as inputs, in order to generate a third floating point value. The use of the specified value N to constrain both the magnitude and the error bound of the second floating point value causes roundoff error to be inhibited in the third floating point value that is generated by the argument reduction operation. This enables such an argument reduction operation to be used as part of a more complex computation, such as a logarithm computation, with the inhibiting of roundoff error in the argument reduction result allowing the overall result to exhibit small relative error across the whole representable input range.