Floating Point Chained Multiply Accumulate Rounding Circuit

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Solution Overview

Problem

Existing floating point data processing systems face inefficiencies in performing chained multiply accumulate operations due to the conventional practice of rounding intermediate results before accumulation, which can lead to errors and inaccuracies in the final result.

Innovation Solution

The apparatus and method for performing a floating point chained multiply accumulate operation involve a multiplier, an adder, and rounding circuitry that generate unrounded results and associated rounding data, allowing for accurate rounding of both multiplication and accumulation results in a single final phase, thereby improving precision and efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If intermediate results are rounded before accumulation in conventional floating point multiply accumulate operations, then the device complexity is reduced and processing speed is improved, but the manufacturing precision and reliability of the final result deteriorate due to accumulated rounding errors

Engineering Contradiction:
Improveprocessing speedVSAvoidaccuracy of final result
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent segments the rounding operation into two distinct phases: (1) intermediate rounding of the multiplication result to produce a rounded multiply result, and (2) final rounding of the accumulation result. By separating these rounding operations and maintaining the unrounded multiply result in a register during the accumulation phase, the system achieves both intermediate processing efficiency and final result accuracy, resolving the contradiction between processing speed and manufacturing precision.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If intermediate results are rounded before accumulation, then the device complexity is reduced, but the manufacturing precision deteriorates due to loss of information from premature rounding

Engineering Contradiction:
Improvecomplexity of rounding circuitryVSAvoidprecision of accumulation result
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent introduces an intermediary component - a register - that holds the unrounded multiply result during the accumulation phase. This intermediary allows the system to perform accumulation using the full precision unrounded value while still benefiting from the structured intermediate rounding process, thereby maintaining manufacturing precision without significantly increasing device complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of time

If rounding is applied immediately after multiplication, then the processing time is reduced, but the reliability of the final accumulation result deteriorates due to propagation of rounding errors

Engineering Contradiction:
Improvetime for rounding operationsVSAvoidreliability of accumulation result
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent applies preliminary rounding to the multiplication result to produce a rounded multiply result that can be used immediately in the accumulation operation, reducing processing time. Simultaneously, the system preserves the unrounded multiply result in a register for the final accumulation step, ensuring that the most accurate data is used for the reliability-critical final result, thus resolving the contradiction between time efficiency and result reliability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10310818B2Floating point chained multiply accumulate
Publication Date: 2019.06.04 ARM LTD
  • US10310818B2 patent drawing
  • US10310818B2 patent drawing
  • US10310818B2 patent drawing

AI summary

Floating point chained multiply accumulation is performed using a multiplier to multiply a first floating point operand by a second floating point operand to generate an unrounded multiplication result. An adder then adds a third floating point operand to the unrounded multiplication result to generate an unrounded accumulation result. Rounding circuitry then applies both the rounding associated with the unrounded multiplication result and rounding associated with the unrounded accumulation result to generate a rounded accumulation result.