Floating Point Circuit Division via Fused Multiply-Add Transform
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Solution Overview
Problem
Existing floating point operation circuits require dedicated hardware accelerators for division operations, which are costly, area-intensive, and lack flexibility, limiting their implementation in applications with space and budget constraints.
Innovation Solution
A method where a floating point operation circuit performs a fused multiplication and addition operation to also support division by generating a transform factor and simplified value, allowing division operations to be executed without a dedicated hardware accelerator, utilizing the circuit's existing registers and arithmetic units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a dedicated hardware accelerator is implemented for division operations, then the division speed is improved, but the area and cost increase significantly
Solution Approach 1:
The floating point operation circuit is designed to perform multiple functions including fused multiplication and addition operations as well as division operations. By generating transform factors and simplified values, the circuit enables division functionality without requiring a separate dedicated hardware accelerator, thus reducing area while maintaining versatility
Solution Approach 2:
The circuit transforms the division operation into a different computational form by generating transform factors and simplified values from the divisor. This parameter transformation allows the division operation to be executed using the existing fused multiplication and addition circuitry, achieving fast division without additional hardware
2Speed
If a dedicated hardware accelerator is implemented for division operations, then the division speed is improved, but the cost increases
Solution Approach 1:
The floating point operation circuit is designed to perform multiple functions including fused multiplication and addition operations as well as division operations. By generating transform factors and simplified values, the circuit enables division functionality without requiring a separate dedicated hardware accelerator, thus reducing area while maintaining versatility
Solution Approach 2:
The division operation functionality is merged into the existing floating point operation circuit that performs fused multiplication and addition. This consolidation eliminates the need for separate hardware accelerator components, reducing both manufacturing cost and circuit area while maintaining division capability
3Adaptability or versatility
If a dedicated hardware accelerator is implemented for division operations, then the division operation is supported, but the flexibility decreases
Solution Approach 1:
The floating point operation circuit is designed to perform multiple functions including fused multiplication and addition operations as well as division operations. By generating transform factors and simplified values, the circuit enables division functionality without requiring a separate dedicated hardware accelerator, thus reducing area while maintaining versatility
Data Source
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AI summary
An operating method of a floating point operation circuit includes, in response to receiving a first instruction, generating a first output by performing a fused multiplication and addition operation on a first input, a second input, and a third input. The method further includes, in response to receiving a second instruction, generating a second output by inverting one input of a fourth input, a fifth input, and a sixth input. Generating the second output includes generating a transform factor and a simplified value from the one input.