Floating-Point CORDIC Circuit Eliminates Co-Processor Overhead
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Solution Overview
Problem
Current systems for implementing the CORDIC algorithm in processors require a co-processor for floating-point operations, leading to inefficiencies due to communication overhead and the need for conversion between floating-point and integer representations, which reduces system efficiency.
Innovation Solution
A processor with an integrated digital signal processing (DSP) circuit that includes a floating-point CORDIC circuit, featuring a counter, angle updating circuit, and coordinate updating circuit with custom floating-point adder/subtractor circuits, allowing direct floating-point CORDIC function computations without the need for external co-processor communication or representation conversions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a co-processor is used to implement CORDIC function, then the processor can offload CORDIC computations, but communication overhead between processor and co-processor reduces system efficiency
Solution Approach 1:
The patent integrates the CORDIC circuit directly into the processor core, merging previously separate processor and co-processor functions into a unified architecture. This eliminates the communication interface and data transfer mechanisms between processor and co-processor, directly resolving the contradiction by removing the source of communication overhead while maintaining full CORDIC computation capability.
2Ease of manufacture
If integer representation is used in CORDIC circuit, then hardware implementation is simplified, but conversion between floating-point and integer representations increases processor burden
Solution Approach 1:
The patent changes the numerical representation parameter from integer to floating-point throughout the CORDIC circuit. By modifying the data format parameter to match the processor's native floating-point format, the invention eliminates conversion operations while maintaining hardware feasibility through direct floating-point arithmetic operations in the CORDIC algorithm.
3Productivity
If floating-point CORDIC function is implemented, then direct floating-point calculations are enabled, but hardware complexity increases compared to integer implementation
Solution Approach 1:
The patent implements self-service by having the CORDIC circuit natively support floating-point operations without requiring external conversion infrastructure. The floating-point adder/subtractor circuits within the CORDIC unit directly process floating-point data, making the system self-sufficient and eliminating dependence on separate conversion mechanisms, thereby justifying the increased hardware complexity through gained operational efficiency.
Data Source
AI summary
A circuit for computing sine and cosine of an angle iteratively includes: a counter; an angle updating circuit configured to compute, for each iteration, an updated value of the angle; and a coordinate updating circuit including: a first register for storing a cosine value; a second register for storing a sine value; and a first custom floating-point adder/subtractor (CFPAS) circuit and a second CFPAS circuit having a same structure, where an output of the first register and an output of the second register are coupled to a first input terminal and a second input terminal of the first CFPAS circuit, and are coupled to a second input terminal and a first input terminal of the second CFPAS circuit, where an output of the counter is coupled to a third input terminal of the first CFPAS circuit and a third input terminal of the second CFPAS circuit.