Floating-Point Conversion Circuit Using Exponent Offset Shifting
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Solution Overview
Problem
Existing binary logic circuits for converting floating point numbers to fixed point numbers are inefficient due to the need to subtract the exponent bias, which slows down the conversion process and increases hardware requirements.
Innovation Solution
A binary logic circuit with a split-path shifter that determines the shift for the mantissa based on the exponent without subtracting the bias, and single-shifter circuits that offset the exponent to convert floating point numbers to fixed point format using a single shifter for both positive and negative true exponent values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the exponent bias is subtracted to determine the shift amount, then the conversion accuracy is maintained, but the conversion time increases and hardware complexity increases
Solution Approach 1:
The patent extracts only the necessary portion of the exponent information needed for shifting, avoiding the need to subtract the bias. By directly using the exponent bits to control the shifter, the circuit eliminates the subtraction operation while maintaining accurate conversion, thus reducing conversion time without sacrificing precision
Solution Approach 2:
The patent performs preliminary encoding of the exponent such that the shift amount is directly available from the exponent bits without requiring subtraction. The bias value is incorporated into the shifter's control logic in advance, allowing the circuit to skip the subtraction step and directly apply the correct shift amount
2Measurement precision
If the exponent bias is subtracted to determine the shift amount, then the conversion accuracy is maintained, but the hardware requirements increase
Solution Approach 1:
The patent removes the subtraction unit from the circuit by extracting only the essential exponent information needed for shifting. The shifter is configured to use the exponent bits directly, eliminating the need for bias subtraction hardware and reducing overall circuit complexity while maintaining conversion accuracy
Solution Approach 2:
The patent merges the bias value into the shifter's control logic, combining the exponent interpretation and shift amount determination into a single operation. This integration eliminates separate subtraction hardware and reduces the number of logical steps required in the conversion circuit
3Device complexity
If a single shifter is used for both positive and negative true exponent values, then the hardware requirements are reduced, but the circuit must handle a wider range of exponent values
Solution Approach 1:
The patent designs a universal shifter that can handle both positive and negative true exponent values using the same hardware structure. The shifter interprets the exponent bits directly to determine the shift direction and amount, making the circuit adaptable to the full range of exponent values without requiring separate hardware paths
Data Source
AI summary
A binary logic circuit converts a number in floating point format having an exponent E, an exponent bias B=2ew-1−1, and a significand comprising a mantissa M of mw bits into a fixed point format with an integer width of iw bits and a fractional width of fw bits. The circuit includes an offset unit configured to offset the exponent of the floating point number by an offset value equal to (iw−1−sy) to generate a shift value sv of sw bits given by sv=(B−E)+(iw−1−sy), the offset value being equal to a maximum amount by which the significand can be left-shifted before overflow occurs in the fixed point format; a right-shifter operable to receive a significand input comprising a formatted set of bits derived from the significand, the shifter being configured to right-shift the input by a number of bits equal to the value represented by k least significant bits of the shift value to generate an output result, where bitwidth[min(2ew-1−1, iw−1−sy)+min(2ew-1−2, fw)]≤k≤sw, where sy=1 for a signed floating point number and sy=0 for an unsigned floating point number.